MZ@ !L!This program cannot be run in DOS mode. $\h;;;];;;;_;;h;0;i;';X;;l;D;?M;;Y;;^;;Rich;PEL92K!  dp O @@@P hi@.textS `.data~B@.rsrc(@@.relocD,@BH4 lPB2dxjTH@",DXbpx|tj`TF:."zpbXD  *4!92K+0j0^ DDDDDDDDDDimm_atomic_uminimm_atomic_exchimm_atomic_cmp_exchimm_atomic_allocimm_atomic_consumeimm_atomic_umaximm_atomic_andimm_atomic_orimm_atomic_xorimm_atomic_iaddimm_atomic_imaximm_atomic_iminatomic_cmp_storeatomic_xoratomic_iaddatomic_imaxatomic_iminatomic_umaxatomic_uminatomic_oratomic_andemitcutsampleinfosampleposbufinforesinfoeval_snappedeval_centroidubfeibfeimadbfidmovcfcallusubbuaddcdmaxdmindmulftoddtofdaddfirstbit_shifirstbit_hidmov DDDDDDDDDDd3dcompiler_43.dllD3DX: (WARN) D3DX11 relies upon this behavior. D3DX: (WARN) least zero bytes. Deletion of a null pointer should quietly do nothing. D3DX: (WARN) An allocation of zero bytes should return a unique non-null pointer to at D3DX: (WARN) Overloaded ::new and ::delete operators do not conform to C++ standards: ST*TTThT|TSFDIDestroyFDICopyFDICreateFCIDestroyFCIFlushCabinetFCIAddFileFCICreatecabinet.dllD0x%I64xQ@X :7# `9xE| ;debug_breakdnedltdgedeqdcl_gsinstanceseval_sample_indexsyncstore_structuredld_structuredstore_rawld_rawstore_uav_typedld_uav_typeddcl_resource_structureddcl_resource_rawdcl_tgsm_structureddcl_tgsm_rawdcl_uav_structureddcl_uav_rawdcl_uav_typeddcl_thread_groupdcl_hs_join_phase_instance_countdcl_hs_fork_phase_instance_countdcl_hs_max_tessfactordcl_tessellator_output_primitivedcl_tessellator_partitioningdcl_tessellator_domaindcl_output_control_point_countdcl_input_control_point_counths_join_phasehs_fork_phasehs_control_point_phasehs_declsswapcbfrevfirstbit_loderiv_rty_finederiv_rty_coarsederiv_rtx_finederiv_rtx_coarsedcl_interfacedcl_function_tabledcl_function_bodydcl_streamemit_then_cut_streamcut_streamemit_streamloddcl_globalFlagsdcl_indexrangedcl_indexableTempdcl_tempsdcl_output_sgvdcl_output_sivdcl_input_ps_sivdcl_input_sivdcl_resourcedcl_samplerdcl_constantbufferdcl_input_psdcl_maxoutdcl_outputtopologydcl_inputprimitivedcl_input_ps_sgvdcl_input_sgvdcl_outputdcl_inputjmpumadugeultsample_c_lzsample_csample_dsample_lsample_bround_zround_piround_niround_neretcldmsldineiltigeieqderiv_rtyderiv_rtxendswitchemit_then_cutdp2continueccallcbreakcvs_5_0vs_4_1vs_4_0_level_9_0vs_4_0_level_9_3vs_4_0_level_9_1vs_4_0vs_3_0vs_2_xvs_2_avs_2_0vs_1_1vs_1_0vs.3.swvs.3.0vs.2.xvs.2.swvs.2.avs.2.0vs.1.1vs.1.0vstx_1_0ps_5_0ps_4_1ps_4_0_level_9_0ps_4_0_level_9_3ps_4_0_level_9_1ps_4_0ps_3_0ps_2_xps_2_bps_2_aps_2_0ps_1_4ps_1_3ps_1_2ps_1_1ps_1_0ps.3.swps.3.0ps.2.xps.2.swps.2.bps.2.aps.2.0ps.1.4ps.1.3ps.1.2ps.1.1ps.1.0pshs_5_0hsgs_5_0gs_4_1gs_4_0fx_2_0ds_5_0dscs_5_0cs_4_1cs_4_0cso SC@ SCXF SCXFSCXFSD@SDXFXF-XF|-XFt-XFbSG@SGXFSGXFSGXFSH@SHXF@|tld\TLD<4, $    XFXF! XF! eXF!( XFXFXT@XT@|tld\ T L D <  4XF XF!  XF! eXF!4 XFXF00ffffe0e0e0ffff40a0a0a0 _indexable [precise(%i,%i,%i), stride=%u_rcpfloat _uint _uglobal_ugroup_g_t x%i[%i], %d %i | none pointlist linestrip trianglestrip undefined ??? %u point line triangle lineadj triangleadj patch1 patch2 patch3 patch4 patch5 patch6 patch7 patch8 patch9 patch10 patch11 patch12 patch13 patch14 patch15 patch16 patch17 patch18 patch19 patch20 patch21 patch22 patch23 patch24 patch25 patch26 patch27 patch28 patch29 patch30 patch31 patch32 constant linear linear centroid linear noperspective linear noperspective centroid linear sample linear noperspective sample cb%d[%d], dynamicIndexed, immediateIndexed %d_%s domain_quad domain_tri domain_isoline ??? partitioning_integer partitioning_pow2 partitioning_fractional_odd partitioning_fractional_even output_point output_line output_triangle_cw output_triangle_ccw l(%f)_z _nz dcl_immediateConstantBuffer { { , }printf errorf "%s"undecipherable custom data_dynamicindexed fp%u[%u][%u] = {, ft%uft%u ft%u = {, fb%ufb%u, %u, %u, %u %u, %u, %u, mode_default, mode_comparison, mode_monops_%d_%d vs_%d_%d hs_%d_%d ds_%d_%d gs_%d_%d cs_%d_%d // Available Class Types: // Name ID CB Stride Texture Sampler // ------------------------------ ---- --------- ------- ------- // %-30s %4u %9u %7u %7u // Available Class Instances: // Name Type CB CB Offset Texture Sampler // --------------------------- ---- -- --------- ------- ------- %s[%u]// %-27s %4u %2u %9u - - %7u - %7u - // Interface slots, %u total: // Slots // +----------+---------+--------------------------------------- // | Type ID |%4u-%-4u|// | Type ID |%4u |// | Type ID | |%-5u // | Table ID | |// %s shader bytecode: %s Microsoft (R) D3D Shader Disassembler // Note: SHADER WILL ONLY WORK WITH THE DEBUG SDK LAYER ENABLED. Patch ConstantInputOutput// Pixel Shader runs at sample frequency Level9XNA PrepassXNAD3DCOMPILER_DISASSEMBLY_FORCE_HEX_LITERALS
%s %s = %s %s[%d] = 
{

    asm {


    },
asm {


}
    NULL,
NULL;

technique10 
{
    pass 
    {
        // No embedded %s
        %s = %s[%d];
        %s = %s;
        %s = asm {


};        %s = NULL;
    }
}

MaxLODMinLODBorderColorComparisonFuncMaxAnisotropyMipLODBiasAddressWAddressVAddressUFilterRenderTargetWriteMaskBlendOpAlphaDestBlendAlphaSrcBlendAlphaBlendOpDestBlendSrcBlendBlendEnableAlphaToCoverageEnableBackFaceStencilFuncBackFaceStencilPassBackFaceStencilDepthFailBackFaceStencilFailFrontFaceStencilFuncFrontFaceStencilPassFrontFaceStencilDepthFailFrontFaceStencilFailStencilWriteMaskStencilReadMaskStencilEnableDepthFuncDepthWriteMaskDepthEnableAntialiasedLineEnableMultisampleEnableScissorEnableDepthClipEnableSlopeScaledDepthBiasDepthBiasClampDepthBiasFrontCounterClockwiseCullModeFillModeAB_SampleMaskAB_BlendFactorDS_StencilRefGenerateMipsMAXMINREV_SUBTRACTSUBTRACTADDDECRINCRINVERTDECR_SATINCR_SATREPLACEKEEPALWAYSGREATER_EQUALNOT_EQUALGREATERLESS_EQUALEQUALLESSNEVERBACKFRONTMIRROR_ONCEBORDERMIRRORWRAPCLAMPINV_SRC1_ALPHASRC1_ALPHAINV_SRC1_COLORSRC1_COLORINV_BLEND_FACTORBLEND_FACTORSRC_ALPHA_SATINV_DEST_COLORDEST_COLORINV_DEST_ALPHADEST_ALPHAINV_SRC_ALPHASRC_ALPHAINV_SRC_COLORSRC_COLORONETEXT_1BITCOMPARISON_ANISOTROPICCOMPARISON_MIN_MAG_MIP_LINEARCOMPARISON_MIN_MAG_LINEAR_MIP_POINTCOMPARISON_MIN_LINEAR_MAG_POINT_MIP_LINEARCOMPARISON_MIN_LINEAR_MAG_MIP_POINTCOMPARISON_MIN_POINT_MAG_MIP_LINEARCOMPARISON_MIN_POINT_MAG_LINEAR_MIP_POINTCOMPARISON_MIN_MAG_POINT_MIP_LINEARCOMPARISON_MIN_MAG_MIP_POINTANISOTROPICMIN_MAG_MIP_LINEARMIN_MAG_LINEAR_MIP_POINTMIN_LINEAR_MAG_POINT_MIP_LINEARMIN_LINEAR_MAG_MIP_POINTMIN_POINT_MAG_MIP_LINEARMIN_POINT_MAG_LINEAR_MIP_POINTMIN_MAG_POINT_MIP_LINEARMIN_MAG_MIP_POINTSOLIDWIREFRAMEALLZEROTRUEFALSE[%s[%u + %s].%c][%s[%s].%c][%s[%u].%c][%s.%c]%s[%u + (Error: Effects expression assembly in invalid format!Error: Effects expression assembly not found!Error: Error getting Effects expression constant table.Error: Error getting Effects expression literal block. /* ##Internal error##0x%02x */%s  = {  =  : %s : packoffset(c%u.%c) : register(%c%u) = { "%s", "%s" = "%s"<
// Offset: %4u, size: %4u
// %u %s buffer(s)
single asm {
/* Stream %u out decl: "%s" *//* Stream %u to rasterizer *//* Interface parameter %u bound to: %s%s[%s[%s]%s[eval()]eval(/* Stream out decl: "%s" */
{,
// %u %s object(s)
// %u %s interface(s)
// %u technique(s)
technique11technique10pass

// %u groups(s)
fxgroup// FX Version: %s
// Child effect (requires effect pool): %s
localsharedbool4x4bool4x3bool4x2bool4x1bool3x4bool3x3bool3x2bool3x1bool2x4bool2x3bool2x2bool2x1bool1x4bool1x3bool1x2bool1x1uint4x4uint4x3uint4x2uint4x1uint3x4uint3x3uint3x2uint3x1uint2x4uint2x3uint2x2uint2x1uint1x4uint1x3uint1x2uint1x1int4x4int4x3int4x2int4x1int3x4int3x3int3x2int3x1int2x4int2x3int2x2int2x1int1x4int1x3int1x2int1x1float4x4float4x3float4x2float4x1float3x4float3x3float3x2float3x1float2x4float2x3float2x2float2x1float1x4float1x3float1x2float1x1bool4bool3bool2bool1uint4uint3uint2uint1int4int3int2int1float4float3float2float1D3DEffectCompilerMIPLODBIASMIPMAPLODBIASMIPFILTERMINFILTERFILTERMAGFILTERDMAPOFFSETELEMENTINDEXSRGBTEXTUREMAXLODMAXMIPLEVEL$Globalsregister or offset bind %s.%s not validregister or offset bind %s not validInternal Error - there was a problem getting a type sizeThere was an unexpected error in the parse treeVariable has an invalid type; is the structure definition empty?$super%s does not support structs without membersinterfaces cannot be embedded in other typesIncorrect number of rows or columnsObjects not allowed in structuresOnly single-dimensional object arrays are allowedUnexpected template typeStringRWTexture1DRWTexture1DArrayRWTexture2DRWTexture2DArrayRWTexture3DRWBufferByteAddressBufferRWByteAddressBufferStructuredBufferRWStructuredBufferAppendStructuredBufferConsumeStructuredBufferSamplerComparisonStateUnexpected component typeUnexpected node encountered when trying to determine typeThere was a problem getting annotationsOnly numeric types and strings are allowed as annotationsThis object can only be bound to one slot in this version of EffectsNumeric variables ('%s') can't be shared; share the containing cbuffer insteadOnly numeric variables ('%s') can be added to a cbufferError: constant buffer %s has both user-defined offset and compiler-assigned offsetsBuffers can only be bound to one slot in this version of EffectsConstant buffers, functions, and techniques cannot be nested inside of constant buffersUnnamed objects are not allowedRedefinition of pass "%s"PassRasterizerDepthStencilBlendSamplerDX9-style assignment syntax is deprecated in technique10 pass blocks in favor of new function call syntaxDeprecated DX9 state '%s' is being ignored for %sDeprecated DX9 state '%s' is being ignored for %s; use state '%s' insteadDX9 state '%s' is not supported in %s; use compatibility mode to ignoreDX9 state '%s' is not supported in %s; convert to '%s' or use compatibility mode to ignoreUnrecognized state '%s'State '%s' belongs in %s blocks, not %s blocksGenerateMips is not supported in %sState '%s' is not indexedMax index for effect state '%s' is %dIndex is required for state '%s'SetComputeShaderSetDomainShaderSetHullShaderInternal error: unrecognized SB API Call%s is not supported on %sInternal error: unrecognized assignment type(unnamed)SV_IsFrontFaceSV_SampleIndexERROR: Semantic %s is not supported in fx_4_1.Stage linkage warning: Semantic %s has been placed in different registers in the two stages.Stage linkage warning: Semantic %s has been inconsistently defined in the two stages.Stage linkage warning: Semantic %s is read from, but it's never written to.%s: ERROR: If either a HullShader or DomainShader is set then both must be set. Technique %s, Pass %s.%s: ERROR: No valid %s-%s combination could be found in Technique %s, Pass %s.%s: WARNING: There exist invalid %s-%s combinations in Technique %s, Pass %s, depending on which elements of the specified shader array(s) are chosen.'%s': samplers can only be used with declared textures or texture assignmentsAssignment %s: Reference to shader variable '%s' not valid for %s techniques because it uses an uninitialized shaderAssignment %s: Reference to shader variable '%s' not valid for %s techniques because it uses an unsupported shader modelAssignment %s: Reference to shader variable '%s' not valid for %s techniques because it is missing interface parameter bindingsUnrecognized RHS value in assignment: '%s'There was an error compiling HLSL shader variableUndefined shader variable '%s'%s can't operate on array referencesStream output geometry shaders can only be created from valid 4.0+ vertex and geometry shaders%s can only be used with non-NULL shadersInvalid shader type used with %sIdentifier invalid or not found (were you attempting a forward reference?)%s does not support multi-output stream outStreamOut declarations must be a literal stringInvalid StreamOut decl: %sInvalid StreamOut declStreamOut rasterization stream index must be a literalConstructGSWithSO%s does not support interface bindingsinvalid interface binding parametercannot bind interfaces to classes in tbuffersBindInterfacesBindInterfaces used with a shader that does not have interface parametersIncorrect number of parameters for BindInterfacesinterface variables can only be initialized with concrete classesIllegal initializer for a numeric variableCan't create/set an invalid shader. Make sure your shader is valid, and make sure you're not using asm shaders in SM4.0Illegal initializerUnrecognized token %sInternal error in compilerShader model %s is not allowed in D3D10 techniquesThere was an error compiling expressionAssignment %s: Non-array right-hand type expectedAssignment %s: Only literal right-hand side values are allowed in state blocks in Effects performance modeAssignment %s: Left-hand side type does not match right-hand side typeAssignment %s: Attempting to assign an incompatible inline shaderAssignment %s: Inline shader missing interface parameter bindingsAssignment %s: Only 0 and NULL are valid constants for an object assignmentAssignment %s: Dimensionality mismatch (LHS expects %d, RHS has %d)Invalid assignment index (%u). Maximum allowed is %u.TEXTURE assignments inside of samplers cannot be variable indexedTEXTURE assignments inside of samplers cannot be expression indexedAssignment %s: Expressions cannot be evaluated to produce objects, though they may be used to index into arrays of objectsAssignment %s: Objects left-hand sides cannot be assigned to expressionsEffect file is too large, try reducing the number of techniques or compiling without debug infoSV_PrimitiveID$SKIPrgbaID3D10Effect::ParseSODecl - invalid mask declaration '%s'ID3D10Effect::ParseSODecl - Invalid output slotID3D10Effect::ParseSODecl - Non-digit '%c' in output slot$PRESHADER_PS$PRESHADER_VSSTATEBLOCKSAMPLERMAXANISOTROPYBORDERCOLORADDRESSWADDRESSVADDRESSUPIXELSHADERCONSTANT4PIXELSHADERCONSTANT3PIXELSHADERCONSTANT2PIXELSHADERCONSTANT1PIXELSHADERCONSTANTPIXELSHADERCONSTANTIPIXELSHADERCONSTANTBPIXELSHADERCONSTANTFVERTEXSHADERCONSTANT4VERTEXSHADERCONSTANT3VERTEXSHADERCONSTANT2VERTEXSHADERCONSTANT1VERTEXSHADERCONSTANTVERTEXSHADERCONSTANTIVERTEXSHADERCONSTANTBVERTEXSHADERCONSTANTFPIXELSHADERVERTEXSHADERLIGHTENABLELIGHTPHILIGHTTHETALIGHTATTENUATION2LIGHTATTENUATION1LIGHTATTENUATION0LIGHTFALLOFFLIGHTRANGELIGHTDIRECTIONLIGHTPOSITIONLIGHTAMBIENTLIGHTSPECULARLIGHTDIFFUSELIGHTTYPEMATERIALPOWERMATERIALEMISSIVEMATERIALSPECULARMATERIALAMBIENTMATERIALDIFFUSETEXTURETRANSFORMWORLDTRANSFORMVIEWTRANSFORMPROJECTIONTRANSFORMFVFPATCHSEGMENTSTEXTURETRANSFORMFLAGSBUMPENVLOFFSETBUMPENVLSCALETEXCOORDINDEXBUMPENVMAT11BUMPENVMAT10BUMPENVMAT01BUMPENVMAT00RESULTARGALPHAARG2ALPHAARG1ALPHAARG0ALPHAOPCOLORARG2COLORARG1COLORARG0COLOROPBLENDOPALPHADESTBLENDALPHASRCBLENDALPHASEPARATEALPHABLENDENABLEDEPTHBIASSRGBWRITEENABLECOLORWRITEENABLE3COLORWRITEENABLE2COLORWRITEENABLE1CCW_STENCILFUNCCCW_STENCILPASSCCW_STENCILZFAILCCW_STENCILFAILTWOSIDEDSTENCILMODEENABLEADAPTIVETESSELLATIONADAPTIVETESS_WADAPTIVETESS_ZADAPTIVETESS_YADAPTIVETESS_XMAXTESSELLATIONLEVELMINTESSELLATIONLEVELANTIALIASEDLINEENABLESLOPESCALEDEPTHBIASSCISSORTESTENABLENORMALDEGREEPOSITIONDEGREEBLENDOPTWEENFACTORCOLORWRITEENABLEINDEXEDVERTEXBLENDENABLEDEBUGMONITORTOKENPATCHEDGESTYLEMULTISAMPLEMASKMULTISAMPLEANTIALIASPOINTSCALE_CPOINTSCALE_BPOINTSCALE_APOINTSCALEENABLEPOINTSPRITEENABLEPOINTSIZE_MAXPOINTSIZE_MINPOINTSIZECLIPPLANEENABLEVERTEXBLENDEMISSIVEMATERIALSOURCEAMBIENTMATERIALSOURCESPECULARMATERIALSOURCEDIFFUSEMATERIALSOURCENORMALIZENORMALSLOCALVIEWERCOLORVERTEXFOGVERTEXMODEAMBIENTLIGHTINGCLIPPINGWRAP15WRAP14WRAP13WRAP12WRAP11WRAP10WRAP9WRAP8WRAP7WRAP6WRAP5WRAP4WRAP3WRAP2WRAP1WRAP0TEXTUREFACTORSTENCILWRITEMASKSTENCILMASKSTENCILREFSTENCILFUNCSTENCILPASSSTENCILZFAILSTENCILFAILSTENCILENABLERANGEFOGENABLEFOGDENSITYFOGENDFOGSTARTFOGTABLEMODEFOGCOLORSPECULARENABLEFOGENABLEALPHABLENDENABLEDITHERENABLEALPHAFUNCALPHAREFZFUNCCULLMODEDESTBLENDSRCBLENDLASTPIXELALPHATESTENABLEZWRITEENABLESHADEMODEFILLMODEZENABLETEXCOORDSIZE4_7TEXCOORDSIZE4_6TEXCOORDSIZE4_5TEXCOORDSIZE4_4TEXCOORDSIZE4_3TEXCOORDSIZE4_2TEXCOORDSIZE4_1TEXCOORDSIZE4_0TEXCOORDSIZE3_7TEXCOORDSIZE3_6TEXCOORDSIZE3_5TEXCOORDSIZE3_4TEXCOORDSIZE3_3TEXCOORDSIZE3_2TEXCOORDSIZE3_1TEXCOORDSIZE3_0TEXCOORDSIZE2_7TEXCOORDSIZE2_6TEXCOORDSIZE2_5TEXCOORDSIZE2_4TEXCOORDSIZE2_3TEXCOORDSIZE2_2TEXCOORDSIZE2_1TEXCOORDSIZE2_0TEXCOORDSIZE1_7TEXCOORDSIZE1_6TEXCOORDSIZE1_5TEXCOORDSIZE1_4TEXCOORDSIZE1_3TEXCOORDSIZE1_2TEXCOORDSIZE1_1TEXCOORDSIZE1_0TEX8TEX7TEX6TEX5TEX4TEX3TEX2TEX1TEX0LASTBETA_D3DCOLORLASTBETA_UBYTE4XYZWXYZB5XYZB4XYZB3XYZB2XYZB1XYZRHWXYZDIRECTIONALSPOTPROJECTEDCOUNT4COUNT3COUNT2COUNT1GAUSSIANQUADPYRAMIDALQUADALPHAREPLICATECOMPLEMENTCONSTANTTEMPTFACTORTEXTURECURRENTSELECTMASKLERPMULTIPLYADDDOTPRODUCT3BUMPENVMAPLUMINANCEBUMPENVMAPMODULATEINVCOLOR_ADDALPHAMODULATEINVALPHA_ADDCOLORMODULATECOLOR_ADDALPHAMODULATEALPHA_ADDCOLORPREMODULATEBLENDCURRENTALPHABLENDTEXTUREALPHAPMBLENDFACTORALPHABLENDTEXTUREALPHABLENDDIFFUSEALPHAADDSMOOTHADDSIGNED2XADDSIGNEDMODULATE4XMODULATE2XMODULATESELECTARG2SELECTARG1SPHEREMAPCAMERASPACEREFLECTIONVECTORCAMERASPACEPOSITIONCAMERASPACENORMALPASSTHRUREVSUBTRACTCLIPPLANE5CLIPPLANE4CLIPPLANE3CLIPPLANE2CLIPPLANE1CLIPPLANE0TWEENING3WEIGHTS2WEIGHTS1WEIGHTS0WEIGHTSDISABLECONTINUOUSDISCRETEQUINTICCUBICQUADRATICALPHABLUEGREENREDCOORD3COORD2COORD1COORD0WVUCOLOR2COLOR1MATERIALUSEWLINEAREXP2EXPDECRSATINCRSATGREATEREQUALNOTEQUALLESSEQUALCCWCWMIRRORONCEINVBLENDFACTORBLENDFACTORBOTHINVSRCALPHABOTHSRCALPHASRCALPHASATINVDESTCOLORDESTCOLORINVDESTALPHADESTALPHAINVSRCALPHASRCALPHAINVSRCCOLORSRCCOLORPOINTPHONGGOURAUDFLATID3DXEffectCompiler: Unexpected template typeID3DXEffectCompiler: Unexpected component typeID3DXEffectCompiler: Unexpected node encountered when trying to determine typeID3DXEffectCompiler: There was an error initializing parameter handlesID3DXEffectCompiler: There was an error initializing parameter annotation handlesID3DXEffectCompiler: There was an error initializing technique annotation handlesID3DXEffectCompiler: There was an error initializing pass annotation handlesID3DXEffectCompiler: There was an error initializing the compilerID3DXEffectCompiler: There was a problem getting variable typeID3DXEffectCompiler: Error initializing variable typeID3DXEffectCompiler: There was a problem in the parse treeID3DXEffectCompiler: There was a problem getting annotationsID3DXEffectCompiler: Only numeric types and strings are allowed as annotationsID3DXEffectCompiler: Error initializing annotation typeID3DXEffectCompiler: Only numeric types are allowed inside structuresID3DXEffectCompiler: Arrays must be either numeric, structure, string or shaderID3DXEffectCompiler: Only pass allowed within a techniqueID3DXEffectCompiler: Unrecognized state '%s'ID3DXEffectCompiler: State '%s' is not indexedID3DXEffectCompiler: Max index for effect state '%s' is %dID3DXEffectCompiler: Index is required for state '%s'ID3DXEffectCompiler: DMAPOFFSET sampler state can only be used with D3DDMAPSAMPLER (i.e. sampler index 256)ID3DXEffectCompiler: Invalid sampler index %dID3DXEffectCompiler: Invalid integer expression assignmentID3DXEffectCompiler: Unsupported sampler or stateblock expression (static usage not supported).ID3DXEffectCompiler: Can't set shader'ID3DXEffectCompiler: Geometry shader can only be set in fx_4_0 or higher.'ListID3DXEffectCompiler: Internal Error: Unexpected state.ID3DXEffectCompiler: Initializer list elements cannot be complex expressions or variablesID3DXEffectCompiler: Unexpected errorID3DXEffectCompiler: Error in type checkingID3DXEffectCompiler: State '%s' does not accept '%s' as a valueID3DXEffectCompiler: State '%s' accepts only dwords and idsID3DXEffectCompiler: FVFs must not evaluate to NULLID3DXEffectCompiler: Dword expressions for state '%s' must evaluate to NULLID3DXEffectCompiler: State '%s' was assigned an unsupported valueID3DXEffectCompiler: Error initializing assignment typeID3DXEffectCompiler: Internal error initializing assignment - missing type caseID3DXEffectCompiler: Assignment cannot be a structureID3DXEffectCompiler: Initializers must be numeric scalarsID3DXEffectCompiler: State '%s' cannot be assigned an array or structureID3DXEffectCompiler: State '%s' was not assigned a stateblock typeID3DXEffectCompiler: State '%s' was not assigned a sampler typeID3DXEffectCompiler: State '%s' was not assigned a texture typeID3DXEffectCompiler: State '%s' was assigned an incompatible typeID3DXEffectCompiler: State '%s' must be assigned a numeric scalar or a 4-float vectorID3DXEffectCompiler: State '%s' must be assigned a scalarID3DXEffectCompiler: State '%s' must be assigned a 3-vector or a 4-vector or a uint scalarID3DXEffectCompiler: State '%s' must be assigned a numeric valueID3DXEffectCompiler: Unexpected value type of state '%s' (internal error)ID3DXEffectCompiler::CompileEffect: There was an error compiling HLL shader parameterID3DXEffectCompiler::CompileEffect: Unrecognized value typeID3DXEffectCompiler::CompileEffect: Only 1-d shader arrays allowedID3DXEffectCompiler::CompileEffect: Shader arrays must be a previously defined parameterID3DXEffectCompiler::CompileEffect: Shader arrays index was not float or intID3DXEffectCompiler::CompileEffect: Shader arrays index %d out of bounds [0, %d]ID3DXEffectCompiler::CompileEffect: There was an error compiling expressionID3DXEffectCompiler::CompileEffect: Could not compile expression containing shader arrayID3DXEffectCompiler: There were no techniquesID3DXEffectCompiler: This sampler is used with a DX10-style texture intrinsic. This is not implemented in this version of the compiler.ID3DXEffectCompiler: Compilation failed"Output variable %s%s contains a system-interpreted value (%s) which must be written in every execution path of the shader <| A%u (B%u)%s%s contains a system-interpreted value (%s) which should be written in every execution path of the shader <| A%u (B%u)emitting a system-interpreted value which is not written in every execution path of the shader <| A%u (B%u)emitting a system-interpreted value which may not be written in every execution path of the shader <| A%u (B%u)Inconsistent semantic definition: %s and %sDuplicate system value semantic definition: %s and %sDuplicate non-system value semantic definition: %s and %sReading uninitialized valuemaximum number of samplers exceeded. %s target can have a maximum of %u samplers%s target does not support texture lookupsinternal error: output register missing semanticinternal error: input register missing semantic  l`UUe? 1?`UU??internal error: emitting a denormNaN and infinity literals not allowed by shader modelmaximum number of inputs exceededoverlapping output semanticsinternal error: statistics append failed, byte count (%d) too large?internal error: non ordinal input/output foundmaximum cbuffer exceeded. target has %u slots, manual bind to slot %u failedcbuffer bank %u used more than oncemaximum cbuffer exceeded. target has %u slotsbooleanconstantiteratorinput - Try reducing number of constant branches, take bools out of structs/arrays or move them to the start of the struct - Try reducing number of constants referenced - Try reducing number of loops, take loop counters out of structs/arrays or move them to the start of the struct - note that the target doesn't support texture sampling intrinsics - note that the target doesn't support textures - note that the target doesn't support UAVsmaximum %s %s register index (%u) exceeded - note that the minimum index is %u%smaximum %s %s register index (%u) exceeded%sinvalid register semantic '%s', or variable must be bound to multiple register banks (%c register binding required)%s registers live in the same name space as outputs, so they must be bound to at least %c%u, manual bind to slot %s failedmaximum %s register index exceeded, target has %d slots, manual bind to slot %s failedoverlapping register semantics not yet implemented '%c%u'Using sampler arrays with texture objects on DX9 targets is not yet implemented.Cannot use texture arrays on DX9 targets with multiple samplers.Invalid %s semantics - POSITIONT0invalid %s %s'%s', or '%s'one of '%s', '%s'Sample interpolation usage unsupported on %snointerpolation usage unsupported on %snoperspective usage unsupported on %sSV_SampleIndex isn't supported on %sMaximum semantic index (%d) exceeded: %d%s semantic '%s' cannot be centroid%s semantic '%s' has been deprecated; use '%s%d' insteadinvalid %s semantic '%s': Legal indices are in [%d,%d]invalid type used for '%s' %s semanticsintegralinvalid type used for '%s' %s semantics, must be %sinternal error: result violated port constraintsinternal error: non-vectorized pool violated port constraintsrelative address references too deepinternal error: multiple write to same outputalcannot match lerp because lerp factor is not _sat'dinternal error: instruction missing outputsinternal error: IF with size greater then 1 foundcannot clip from a swizzled vectorclip must be performed from a float3 vector for ps_1_x modelsclip must be performed from a float4 vector for ps_2_0 modelsinternal error: unexpected input register typeclip cannot be performed from a constant or literalconstant table info exceeds maximum comment size%s+%sc_%sb_%si_%ss_%sMicrosoft (R) HLSL Shader Compiler 9.29.952.3111maximum temp register index exceededmaximum address register index exceededmaximum predicate register index exceededinternal error: unexpected output register typeinternal error: overlapping output writesmaximum input register index exceededmaximum constant register index exceeded - Try reducing number of constants referencedmaximum bool register index exceededmaximum sampler register index exceededmaximum loop register index exceededtarget does not support relative addressingtessfactor semantic out of orderconflicting quad/tri/isoline tessfactor semantictessfactor semantics must be in the same component%s output limit (%d) exceeded, shader uses %d outputs.%s input limit (%d) exceeded, shader uses %d inputs.internal error: no semantic found on i/o argumentSemantic length is limited to %d charactersinternal error: output found with no semanticSV_PositionSV_Targetsemantic '%s' unsupported on %soutput %s%u used more than onceinteger inputs unsupported on %sNot all elements of SV_Position were writtentessfactor inputs missingClip planes cannot be addressed in %sClip planes must be non-literal constants with identity swizzles in %sUnsized MSAA textures aren't supported on this targetTextureCubeArray textures aren't supported on this targettexture2DMS cannot be more than 127 samplesTexture1D types are unsupported on %stexture mismatch: texture used inconsistently, can only use one DX9-style texture intrinsic on individual samplers or sampler arrays$ElementRWStructuredBuffers may increment or decrement their counters, but not both.The array element count of GetDimensions on TextureCubeArray objects is unavailable on %scannot sample from non-floating point texture formats.sampler mismatch: sampler used inconsistently		P	#	 	)			)pp
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		VOIDnegasinacosatansqrtinegnotitofutofftoiftoubtofbtoiitobftobroundfloorceilatan2divbiltbigebieqbinebugebultiaddidivimuludivumodumuliminimaxuminumaxandorxorishlishrushrmovcdotnoised3ds_dotswizd3ds_noiseswizfxl_2_0txtoo many arguments to target TXtoo many outputs to target TXclip not supported in texture shadersinvalid reference to input semantic '%s%d'invalid reference to output semantic '%s%d'internal error: gradient instruction sent to preshaderp

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		SV_GroupIndexSV_DispatchThreadIDSV_GroupThreadIDSV_GroupIDSV_DomainLocationSV_InsideTessFactorSV_TessFactorSV_OutputControlPointIDColorSV_GSInstanceIDSV_ViewportArrayIndexSV_RenderTargetArrayIndexSV_VertexIDSV_InstanceIDSV_CullDistanceSV_ClipDistanceVFaceVPosPositionFailed to log error, redirecting to debug output:
hs_5_0 patch constanths_5_0 control pointSum of temp registers and indexable temp registers exceeds limit of %u
sum of temp registers and indexable temp registers times %u threads exceeds the recommended total %u.  Performance may be reducedThe total amount of group shared memory (%u bytes) exceeds the %s limit of %d bytes
internal error gathering debug scope informationinternal error gathering debug variable informationinternal error gathering debug input informationinternal error gathering debug file informationMaximum %s control point count (%u) exceeded (%u).internal error: debug info append failed, byte count (%d) too large?internal error: scalar instruction with too many inputsinternal error: expected binary instruction for scalar RHSmaximum number of interface pointers exceeded (%s max is %u)interface calls cannot be indexed with varying values%s can only emit to streams 0-%u%s can only emit to 1 stream%s does not support stream outgeometry shader didn't emit anythingwhen multiple GS output streams are used they must be pointlists@DHLT\dpp`P@T0 Shaders compiled for %s can only have a single group shared data item
Group shared data for %s must have a count of elements (%u) equal to the number of threads in the thread group (%u)
Group shared data for %s must have an element size (%u) of at most %u bytes when compiling for %u theads
Group shared data for %s must be an array of elements
internal error: modifier used on addressinternal error: Constant buffer used as addressinternal error: binary instruction expectedinternal error: vectorized instruction too largeinternal error: expected scalar RHS for instruction%s does not support structured buffersstructured buffer element size must be a multiple of %u bytes in %s (actual size %u bytes)structured buffer elements cannot be larger than %u bytes in %s (actual size %u bytes)offset texture instructions must take offset which can resolve to integer literal in the range -8 to 7MSAA Sample Index must be in the range 0 to 127MSAA Sample Index must be a literalSample Bias value is limited to the range [-16.00, 15.99], using %f instead of %f%s does not support UAVs%s does not support Append/Consume buffers%s does not support typed UAVsidiv currently not supported (instruction deprecated). For now, try using unsigned int types for div insteadtyped UAV stores must write all declared components.stores to group shared memory for %s targets must be indexed by an SV_GroupIndex only%s snap offset must be in the range -8 to 7cannot map expression to %s instruction setinternal error: failed to emit instructionSV_Position cannot be constinterpSV_Coverage input not supported on %sSV_Coverage not supported on %sinvalid semantic '%s' on pixel shader output	P	01	B		App
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		|~H?PsizeTessfactorSpecularDiffuseSampleDepthFogPositionTBinormalTangentTexcoordPSizeNormalBlendIndicesBlendWeightinternal error: no profile exists for this shader versionPSIZE must be a scalarvertex shader must minimally write all four components of POSITIONDEPTH must be a scalarpixel shader must minimally write all four components of COLOR0COLOR%d must be a four-component vectorCOLOR outputs must be contiguous from COLOR0 to COLORncannot map expression to vertex shader instruction setcannot map expression to pixel shader instruction setUnsupported texture type for %sinternal error: unexpected Alias on texture declarationrelative addressing not supported in vs_1_0 instruction set	P		p		pp
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		allow_uav_conditiona uint specifying the number of iterations to unrollcountunrollfastoptforcecaseflattenn/abranch/WX/Gis/Gec/Ges/Gfp/Gfa/Gpp/Zpc/Zpr/Od/Vd/ZipEntrypoint pointer is invalidinternal error: expression expectedexpressions returning objects in an array or struct not yet implementedcompile expression does not refer to a compilable function.  API calls such as ConstructGSWithSO and BindInterfaces can not be used in arguments to CompileShadercompile expression must specify a valid shader modelasm blocks have not yet been implementednon-trivial object expressions not yet implemented'%s': entrypoint not foundoverloaded function not foundinternal error: blob mismatch between level9 and d3d10 shaderinternal error: blob size mismatch between level9 and d3d10 shaderinternal error: blob content mismatch between level9 and d3d10 shaderD3DCOMPILER_FORCE_PREFER_FLOWFlags parameter is invalidFlags specified both compatibility and strict mode. These are mutually exclusiveFlag specified was exclusively a parse flag and not a compile flagppShader pointer is invalidunrecognized compiler target '%s'vs_2_swvs_3_swps_2_swps_3_swOnly 3_x and earlier targets are supported on this compiler.Only 4_x targets supported on this compiler.ps_1_x is no longer supported; using ps_2_0ps_1_x is no longer supported; use /Gec in fxc to automatically upgrade to ps_2_0Alternately, fxc's /LD option allows use of the old compiler DLL
internal error: compilation aborted unexpectedlycpcinstanceid'%s': variable declared but not defined%s does not support groupshared, groupshared ignored'%s': global variables cannot use the 'half' type in %s. To treat this variable as a float, use the backwards compatibility flag.'%s': %s does not support doubles as a storage type'%s': %s does not support 8-bit or 16-bit integers'%s': %s does not support 64-bit integersinvalid packoffset location '%s'groupshared variables cannot contain resources such as textures, samplers or UAVscannot mix packoffset elements with nonpackoffset elements in a cbufferstream object '%s' cannot be declared in the global scopeinternal error: unrecognized statementTexture sample will be considered dependent since texcoord was not declared as at least float%dDX9-style intrinsics are disabled when not in dx9 compatibility mode.expressions with side effects are illegal as attribute parametersnon-literal parameter(s) found for attribute %scannot match attribute %s, non-uint parameters foundattribute %s expects the %s parameter to be a %s'%s(%s)' attribute expected, where '%s' is %s'%s(%s)' attribute expected, where '%s' are %sexpected %s parameter to be %s, got '%s'cannot match attribute %s, parameter %i is expected to be of type %s%ccan't match attribute %s, %d or 0 parameters expected, found %dcan't match attribute %s, %d parameter(s) expected, found %d, %sunknown attribute %s, or attribute invalid for this statementunknown attribute %s, or attribute invalid for this statement, valid attributes are: %sduplicate attribute %sCannot use %s attribute without specifying a 4-component SV_Position outputdoubles cannot be used as shader inputs or outputs. If you need to pass a double between shader stages you must pass it as two uints and use asuint and asdouble to convert between formsstream parameter must come from a literal expressionstructure being emitted has elements with no semantic defined%s does not support synchronization operations%s does not support thread synchronization operationsthread synchronization operations cannot be used in varying flow controlsigned/unsigned mismatch between destination and value, unsigned assumed%s does not support interlocked operations%s only supports interlocked operations on scalar int or uint datainterlocked targets must be groupshared or UAV elements%s does not support pull-model attribute evaluationattribute evaluation can only be done on values taken directly from inputs%s does not support pull-model evaluation of position'%s': undefined variableinvalid variable reference in static variable initializer.  Locals cannot be used to initialize static variablesinternal error: invalid access of unbound variableinternal error: unrecognized valueout of memoryall template type components must have the same typeunexpected error in GetTypeArgFlagsinvalid register specification, expected 'b' or 'c' bindinginvalid register specification, expected 't' bindingUser defined %s buffer slots cannot be target specificBuffers may only be bound to one slot.Buffers may only be bound to one constant offset.internal warning: loop values did not convergeCannot declare streams as an input for geometry shader primitives, it must be its own parameter.SV_PrimitiveId is an invalid input semantic for geometry shader primitives, it must be its own parameter.SV_GSInstanceID is an invalid input semantic for geometry shader primitives, it must be its own parameter.for better compilation results, consider re-enabling rule "%s"for better compilation results, consider re-enabling rule 0x%08x, forcing loop to unrollout of memory while parsingIllegal character in shader fileautoasm_fragmentasmcasecatchclasscolumn_majorcompilecompile_fragmentconstconst_castcontinueCompileShaderdefaultdeletediscarddodynamic_castenumexplicitexternforfriendgotogroupsharedininlineinoutInputPatchlinelineadjlinearLineStreammatrixmutablenointerpolationnamespacenewnoperspectiveoutoperatorOutputPatchpackoffsetprivateprotectedpublicpointpixelshaderthe 'pixelshader' keyword is deprecated and reserved in strict modePointStreamregisterreinterpret_castrow_majorreturnsampler_statesignedsizeofstateblock_statestaticstatic_castswitchstateblocktemplatetriangletriangleadjthrowtrytypedeftypenametechniquetexture1Dtexture2Dtexture3DtextureCUBEalternate cases for 'Texture1D' are deprecated in strict modealternate cases for 'Texture2D' are deprecated in strict modealternate cases for 'Texture3D' are deprecated in strict modealternate cases for 'TextureCube' are deprecated in strict modeTriangleStreamuniformunionunsignedusingvectorvirtualvolatilevertexshaderthe 'vertexshader' keyword is deprecated and reserved in strict modewhilealternate cases for 'asm' are deprecated in strict modedeclalternate cases for 'decl' are deprecated in strict modealternate cases for 'pass' are deprecated in strict modealternate cases for 'technique' are deprecated in strict modeversion tokentoken '%s'integer constantfloat constantstring constantend of lineend of filetokensyntax error: unexpected %simplicitly output parameter cannot %sconvert %sfrom '%s' to '%s''%s': cannot %sconvert %sfrom '%s' to '%s''%s': conversion from larger type to smaller, possible loss of dataconversion from larger type to smaller, possible loss of data'%s': implicit truncation of vector typeimplicit truncation of vector typeNMLKout %s%s%c%s%s%s%s%cx%c%s%s%s%s%s%spackoffset is only allowed in a constant buffer'%s': invalid shader target/usageregister offset must be a literal scalar expressionparameter liststruct/classfor loopstate blockannotationblockglobaldefault valueinitializervalueinitial valuefunction parametersmethodsstruct/class membersloop variablesmemberspassesannotation memberslocal variablesglobal variablesfunctiontypevariablescopeinvalid(unknown scope entry kind)(unknown scope value kind)P`0``C
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ushortulongsbyteshortlongdwordhalf'%s': identifier represents a %s, not a variable...internal error: unable to process intrinsic'%s': identifier represents a %s, not a function'%s': ambiguous function callcentergloballycoherentsingleunrecognized identifier '%s''%s': too many target specifiers givenduplicate usages specifiedconstinterp usage cannot be used with linear, noperspective, or centroid usageconflicting geometry typesAttrParams$clip_outputsAttributeslocation semantics do not apply to %sslocation semantics cannot be specified on memberspackoffset cannot have a target qualifierusage semantics do not apply to %ssduplicate usage semantic ignoredredefinition of '%s''%s': %s cannot be target specific'%s': %s cannot be declared 'inline''%s': %s cannot be declared 'single''%s': interfaces cannot contain data'%s': interfaces cannot be declared in buffers'%s': extern %s cannot be declared 'static''%s': uniform %s cannot be declared 'static''%s': extern %s cannot be declared 'groupshared''%s': uniform %s cannot be declared 'groupshared''%s': types cannot contain members of their own type'%s': interfaces cannot be members'%s': %s cannot be declared 'const''%s': output parameters cannot be declared 'const''%s': %s cannot be void'%s': %s cannot be declared 'static''%s': %s cannot be declared 'uniform''%s': %s cannot be declared 'uniform out''%s': %s cannot be declared 'extern''%s': %s cannot be declared 'groupshared''%s': %s cannot be declared 'shared''%s': %s cannot be declared 'volatile''%s': array dimensions of %s must be explicit'%s': implicit array missing %s'%s': implicit array type does not match %s'%s': array dimension must be between 1 and 65536redefinition of formal parameter '%s''%s': static members can only be defined in global scopes'%s': static member not found in class'%s': member not a static variable'%s': declaration type differs from definition typeConflicting register semantics: '%s' and '%s''%s': interfaces cannot have semantics'%s': %s cannot have semantics'%s': %s cannot have annotationsstream parameters can only be single-element types'%s': out parameters cannot have default valuespotentially unintended use of a comma expression in a variable initializer'%s': %s cannot have %ss'%s': non-numeric uniform %s cannot have %ss'%s': output only %s cannot have %ss'%s': %s must be a literal expressionstatic interfaces cannot have initializersInitializer used on a global 'const' variable. This requires setting an external constant. If a literal is desired, use 'static const' instead.'%s': missing %s'%s' used but not defined'%s': functions cannot be declared 'uniform''%s': functions cannot be declared 'extern''%s': interface methods cannot be static'%s': function return value cannot contain Effects objects'%s': method not found in class'%s': interface methods cannot be declared outside of an interface'%s': functions cannot have a target'%s': methods cannot have a target or usage'%s': void function cannot have a semantic'%s': missing default value for parameter '%s''%s': return type does not match overridden method%s cannot be redeclared'%s' already defined as a %s%s did not match any prototype in the class'%s': function return value differs from prototype'%s': 'static' mismatch between declaration and definition'%s': default parameters can only be provided in the first prototype'%s': interface methods cannot have bodiesinvalid usage modifier applied to %cbuffervector dimension must be a literal scalar expressionvector dimension must be between 1 and %uvector element type must be a scalar typematrix dimensions must be literal scalar expressionsmatrix dimensions must be between 1 and %umatrix element type must be a scalar typeuntyped textures are deprecated in strict modethe 'sampler1D' keyword is deprecated in strict mode; use 'SamplerState' insteadthe 'sampler2D' keyword is deprecated in strict mode; use 'SamplerState' insteadthe 'sampler3D' keyword is deprecated in strict mode; use 'SamplerState' insteadthe 'samplerCUBE' keyword is deprecated in strict mode; use 'SamplerState' insteadthe 'stateblock' keyword is deprecated in strict modenon-numeric sample countsample count must be non-zeronon-numeric vertex countvertex count must be non-zeromatrix types cannot be both column_major and row_majornon-matrix types cannot be declared 'row_major' or 'column_major'%cnorm can not be used with typeunsigned can not be used with typeobject element type cannot be an object typeobject's templated type must have at least one elementelements of typed buffers and textures cannot be arrayselements of typed buffers and textures must fit in four 32-bit quantitiesinterfaces cannot inherit from other typesbase type is not a struct, class or interfacemultiple concrete base types specified'%s': class does not implement method %sarray dimensions of type must be explicitarray dimensions must be literal scalar expressionsarray dimension must be between 1 and 65536secondary array dimensions must be explicitinterface arrays cannot be multi-dimensionalredefinition of type with struct/classredefinition of type with interfaceRWStructuredBuffer(Decrementable)RWStructuredBuffer(Incrementable)StateBlockTexture2DArrayMS.$super**,%u>%ux%utypedef precise row_major column_major const unorm snorm array_index  9""@"""p"""9RRRSST@V`VVVV0WW99 9@`99:p:::;9`C
0(@@(P(`(p(()9))@)+`,p,0-`.9./@/011p 20344 69p<<<P>A`,<>@BCPE9 F@F@FGG@O`II`JJpL9M MpMMMN@OpOP@PQ9M MpMMMN@O`IP@PQinternal error: no storage type for block outputtriangle_cwtriangle_ccwpow2integerfractional_oddfractional_eventriquadisolinethe clip planes (up to 6) to usec1, c2, c3, c4, c5, c6clipplanesearlydepthstencilthe maximum tessellation factor to allowlimitmaxtessfactorthe number of control points to emitoutputcontrolpointsone of "point", "line", "triangle_cw", or "triangle_ccw"topology typeoutputtopologyone of "integer", "pow2", "fractional_even", or "fractional_odd"partitioning modepartitioningone of "tri", "quad", or "isoline"domain typedomainthe name of the patch constant value evaluation functionfunction namepatchconstantfuncthe dimensions of the thread groupX,Y,Znumthreadsthe number of instances of this shader to execute simultaneouslyinstanceMaxVertexCountthe maximum number of vertices emitted by this shadermaxvertexcount'%s': input parameter '%s' missing semantics, expected %s'%s': stream input parameter '%s' must be an inout parameter'%s': stream input parameter '%s' can only be used in geometry shaders'%s': input parameter '%s' cannot have a geometry specifier'%s': interface input parameters not yet implemented for hull shaders, use a global interface instead$%s'%s': input parameter '%s' conflicts with geometry specifier of previous input parameters'%s': may only have one InputPatch parameter'%s': Patch constant function must use the same input control point type declared in the control point phase.'%s': may only have one OutputPatch parameter'%s': Patch constant function must use the same output control point type returned from the control point phase.'%s': Patch constant function's output patch input should have %d elements, but has %d.'%s': stream input parameter '%s' must be an inout parameter '%s': InputPatch inputs can only be used in hull and geometry (5_0+) shaders'%s': OutputPatch inputs can only be used in the domain shaders and a hull shader's patch constant function'%s': input parameter '%s' must have a geometry specifier'%s': input parameter '%s' missing semantics'%s': input parameter '%s' patch size must be in the range [1,32]'%s': no input primitive specified, if your shader doesn't require inputs, then define an empty struct and give it the proper primitive type.internal error: unrecognized geometry shader input primitive type'%s': interfaces can only be inputs'%s': %s only allows one depth output'%s': function return value missing semantics'%s': output parameter '%s' missing semantics'%s': output parameters not yet implemented for control point shaders'%s': Compute shaders can't return values, outputs must be written in writable resources (UAVs).'%s': stream output parameter '%s' must be an inout parameter '%s': stream output parameter '%s' can only be used in geometry shaders'%s': Geometry shaders can't return values, outputs must be written to streams.'%s': Top-level return value is not completely initialized'%s': output parameter '%s' not completely initialized'%s': Top-level output parameter '%s' not completely initialized'%s': top-level interface arguments cannot be 'out''%s' must have a max vertex count'%s' must have a max vertex count greater then 0%s does not allow instancingGS instance count must be at least 1%s only allows up to %u instancesthe product of the arguments of %s(%u,%u,%u) must be at least %uthe product of the arguments of %s(%u,%u,%u) must be less than or equal to %uthe final dimension specified (%u) for %s must be less than or equal to %u'%s': line output topologies are only available with isoline domains'%s': triangle output topologies are not available with isoline domains'%s' max tesselation factor must be in the range [1,64]Clip plane attribute parameters must be non-literal constantsIndexed expressions are illegal as attribute parameters'%s': recursive functions not allowed in %s'%s': When defining a pass-through control-point shader,you must declare an InputPatch object.'%s': When defining a pass-through control-point shader, the number of output control points must be zero or must match the input patch size.'%s': Not all control paths return a valueinternal error: unassociated return'%s': global structs and classes cannot be changedabstract interfaces not supported on %sinternal error: result register invalid%s does not support doubles%s does not support 8-bit or 16-bit integerscannot use casts on l-valuescannot cast the LHS of an assignment to an indexable object, consider using asuint, asfloat, or asdouble on the RHSin %s uints can only be used with known-positive values, use int if possibleinternal error: l-value expectedinternal error: inconsistent addressinginternal error: addressing inconsistent poolinternal error: inconsistent derivative writerinternal error: invalid sequence/cast expressionBitwise operations not supported on legacy targets.both sides of the && operator are always evaluated, side effect on '%s' will not be conditionalinternal error: AND operator inputs not boolboth sides of the || operator are always evaluated, side effect on '%s' will not be conditionalinternal error: OR operater inputs not bool.mips can only be used in a two-element indexing expression such as .mips[mip][element].sample can only be used in a two-element indexing expression such as .sample[sample][element]both sides of the ?: operator are always evaluated, side effect on '%s' will not be conditionalinternal error: unrecognized expressionDerivatives of indexed variables are not yet implemented.Output value '%s' is not completely initialized>><<!===>=<modulodividemultiplyfirstbithighddy_fineddy_coarseddyddx_fineddx_coarseddxfracrsqrtepsnegateinternal error: chain register invalidinteger divides may be much slower, try using uints if possible.integer modulus may be much slower, try using uints if possible.this operation cannot be used directly on resources containing doubles.internal error: argument missing context <| A%u (B%u)internal error: operand type mismatch%s cannot be used with doubles, cast to float first%s not supported on the given typepdr_uspdr_ubpdr_utpdr_robjpdr_?pdr_mpdr_scpdr_spdr_tspdr_tbpdr_tpdrusubutrobj?sctstbprotoinput types for geometry shader must be arraysarray dimension for %s must be %iGS InputPatch semantics must live in the enclosed type, outer semantic ignored.register %s not valid%c%utexturesUAVs%s does not allow textures or samplers to be members of compound types%s does not allow writable textures, samplers or UAVs to be members of compound types with interface inheritancesemantics in type overridden by variable/function or enclosing typeresources such as textures, samplers or UAVs cannot contain other resourcesinternal error: unknown nodeSV_ClipDistance semantics cannot be used when using the clipplanes attributeDuplicated input semantics can't change type, size, or layout ('%s').globallycoherent can only be used with Unordered Access View buffersgloballycoherent cannot be used with append/consume bufferstyped UAV loads are only allowed for single-component 32-bit element typesInterface-reachable members containing UAVs or group shared variables are not yet implementedinner array index within group shared element must be a literal expression for %srace condition writing to shared resource detected, note that threads will be writing the same value, but performance may be diminished due to contention.race condition writing to shared memory detected, note that threads will be writing the same value, but performance may be diminished due to contention.race condition writing to shared resource detected, consider making this write conditional.race condition writing to shared memory detected, consider making this write conditional.array index out of boundsarray reference cannot be used as an l-value; not natively addressableindex for an array of complex types containing doubles must be a literal expression%s array index must be a literal expressionResource being indexed is uninitialized.Resources being indexed cannot come from conditional expressions, they must come from literal expressions.element type of texture too large. Cannot exceed 4 componentsIncrementCounter/DecrementCounter are only valid on RWStructuredBuffer objectsAppend/Consume not compatible with buffer typecase ordinal too large for floating point representationcan't flatten with flow control when variable is bound to b registercan't use flow control on this profilecan't emit if statement with both gradients and program flow controlinternal error: flattened side effectcan't flatten if statements that contain out of bounds array accessescan't force branch with gradients on non-inputscan't flatten if statements that contain side effectscan't use branch and flatten attributes togethernon-empty case statements must have break or returnerror, duplicate default in switch statementerror, duplicate case %ucan't use branch, flatten, call  or case attributes togetherToo many nested flow control constructsFall-throughs in switch statements are not allowed.can't use call or forcecase attributes on switches in %s programsflow control depth too deep to honor call or forcecase attributecan't use loop and unroll attributes togethercan't use fastopt and unroll attributes togethercan't unroll loops marked with loop attributeliteral loop terminated early due to out of bounds array accessloop only executes for %d iteration(s), consider removing [loop]loop only executes for %d iteration(s), forcing loop to unrollcannot map loop to shader target, target does not support breakscan't use gradient instructions in loops with breakloop executes for more than %d iterations (maximum for this shader target), forcing loop to unrollloop doesn't seem to do anything, consider removing [loop]loop doesn't seem to do anything, forcing loop to unrollinfinite loop detected - loop writes no valuesloop will not exit early, try to make sure the loop condition as tight as possibleautomatic unrolling has been disabled for this loop, consider using [unroll] or manual unrollingloop termination conditions in varying flow control cannot depend on data read from a UAVinfinite loop detected - loop never exitsgradient instruction used in a loop with varying iteration, forcing loop to unrolltexture access must have literal offset and multisample indexsynchronization operations cannot be used in varying flow controlloop simulation finished early, use /O1 or above for potentially better codegencannot unroll loop with an out-of-bounds array reference in the conditionforced to unroll loop, but unrolling failed.unable to unroll loop, loop does not appear to terminate in a timely manner (%d iterations)unable to unroll loop, loop does not appear to terminate in a timely manner (%d iterations), use the [unroll(n)] attribute to force an exact higher numberbreak must be inside loopcontinue must be inside loopConsumeIncrementCounterDecrementCounterstrideStore4Store3Store2StoreLoad4Load3Load2byteOffsetGetSamplePositionsamplesheightGatherRedGatherGreenGatherCmpRedGatherCmpGreenGatherCmpBlueGatherCmpAlphaGatherCmpGatherBlueo4o3o2o1GatherAlphaGatherelementsSampleLevelSampleGradSampleCmpLevelZeroSampleCmpSampleBiasLoadlevelswidthGetDimensionsCalculateLevelOfDetailUnclampedCalculateLevelOfDetailRestartStripAppendtransposetexCUBEprojtexCUBElodtexCUBEgradtexCUBEbiastexCUBEtex3Dprojtex3Dlodtex3Dgradtex3Dbiastex3Dtex2Dprojtex2Dlodtex2Dgradtex2Dbiastex2Dtex1Dprojtex1Dlodtex1Dgradtex1Dbiastex1Dtanhtanstepsmoothstepsinhsignsaturatereversebitsrirefractnreflectradiansprintfnormalizeipmodflog2log10hlerplengthldexpisnanisinfisfinitefwidthfrexpfmodfirstbitlowNgINfaceforwardf32tof16f16tof32exp2Formaterrorfdistancedeterminantdegreescrosscountbitscoshclipclampasuintasintasfloatasdoubleanyallabort__test_intrin4__test_intrin3__test_intrin2__test_intrin1ProcessTriTessFactorsMinProcessTriTessFactorsMaxUnroundedInsideFactorRoundedInsideFactorProcessTriTessFactorsAvgProcessQuadTessFactorsMinProcessQuadTessFactorsMaxProcessQuadTessFactorsAvgRoundedDensityFactorRoundedDetailFactorrRawDensityFactorRawDetailFactorProcessIsolineTessFactorsProcess2DQuadTessFactorsMinProcess2DQuadTessFactorsMaxUnroundedInsideFactorsRoundedInsideFactorsRoundedEdgeFactorsInsideScaleRawEdgeFactorsProcess2DQuadTessFactorsAvgInterlockedXorInterlockedOrInterlockedMinInterlockedMaxInterlockedExchangeInterlockedCompareStorecompareInterlockedCompareExchangeInterlockedAndoriginalresultInterlockedAddGroupMemoryBarrierWithGroupSyncGroupMemoryBarrierGetRenderTargetSamplePositionGetRenderTargetSampleCountoffsetEvaluateAttributeSnappedEvaluateAttributeCentroidindexEvaluateAttributeAtSampleDeviceMemoryBarrierWithGroupSyncDeviceMemoryBarrierD3DCOLORtoUBYTE4AllMemoryBarrierWithGroupSyncAllMemoryBarriergradient operation uses a value that may not be defined for all pixels (in %s UAV loads can not participate in gradient operations)%s does not support aborts%s does not support messagesabs on unsigned values is not meaningful, ignoringvalue cannot be infinity, isfinite() may not be necessary.  /Gis may force isfinite() to be performedvalue cannot be infinity, isinf() may not be necessary.  /Gis may force isinf() to be performedvalue cannot be NaN, isnan() may not be necessary.  /Gis may force isnan() to be performedasfloat can only be used on floating point values on %sasint cannot be used on %sasuint cannot be used on %sasdouble can only be used on uint values on %sasuint can only be used on double values on %sSampler parameter must come from a literal expression.tex1D will be considered dependent since texcoord was not declared as at least float2intrinsic function '%s' is not yet implementedreturn type of texture too large. Cannot exceed 4 componentspow(f, e) will not work for negative f, use abs(f) or conditionally handle negative values if you expect themTessellation factor scale will be clamped to the range [0, 1]Tess factor processing functions only available on shader model 4+GlobalsLocalsStructClassInterfaceState BlockAnnotationinternal error: failed generating debug infoValueinteger literal %u64 too large, truncatedinternal error: this-relative %s '%s' found outsideof function scopestatic method %s cannot refer to instance membersundeclared identifier '%s'data member'%s': initializer does not match typeobject literals are not allowed inside functionsglobal variables are implicitly constant, enable compatibility mode to allow modificationglobal variables are implicitly constant, variables of classes with interface inheritance can never be modifiedl-value specifies const objectint or unsigned int type requiredscalar, vector, or matrix expectedoperator cannot be used with a bool lvaluecouldn't cast expression to integerunary negate of unsigned value is still unsignedcouldn't cast expression to boolean for logical not operatortype mismatchsigned/unsigned mismatch, unsigned assumedcouldn't cast expression to boolean for logical operatorcomma expression used where an initializer list may have been intendedcomma expression used where a vector constructor may have been intendedconstructors only defined for numeric base typescannot convert from 'object type' to 'numeric type'incorrect number of arguments to numeric-type constructorconditional must be numerictype mismatch between conditional valuesdimension of conditional does not match valuearray, matrix, vector, or indexable object type expected in index expressioninvalid type for index - index must be a scalar, or a vector with the correct number of dimensionsSub index listmipsLengthSwizzleinvalid subscript '%s'PartialsInputsOutputsout parameters require l-value arguments (given argument is implicitly const, such as a global)out parameters require l-value arguments'%s': %ss are limited to no more than %u parameters (%u given)'%s': %s does not take %u parameter%sPossible %ss are:    %sParametersMethod and Parametersintrinsic functionmethod%s does not have method '%s''%s': static methods cannot be called on objects%s object does not have methods%s object does not have method '%s'intrinsic methodStmts'%s': void functions cannot return a value'%s': function must return a valuepotentially unintended use of a comma expression in a return statementif statement conditional expressions must evaluate to a scalarcould not cast condition to booleanscalar value expectedcould not cast condition to uintnon-scalar case expressionnon-numeric case expressionCaseStmts'%s': loop control variable conflicts with a previous declaration in the outer scope; most recent declaration will be usedinternal error: unable to add non-conflicting symbolfunction '%s' missing implementationflow control depth too deep to emit function calllate-resolve interface calls nested too deeplyinterface references must resolve to non-varying objectsinternal error: failed to devirtualize a contained interface callno classes implement '%s'SetRenderTargetsSetDepthStencilStateSetBlendStateSetRasterizerStateSetVertexShaderSetPixelShaderSetGeometryShaderD3D10_SHADER_DEBUGD3D10_SHADER_SKIP_OPTIMIZATIOND3D10_SHADER_PARTIAL_PRECISIOND3D10_SHADER_NO_PRESHADERD3D10_SHADER_AVOID_FLOW_CONTROLD3D10_SHADER_PREFER_FLOW_CONTROLD3D10_SHADER_ENABLE_BACKWARDS_COMPATIBILITYD3D10_SHADER_IEEE_STRICTNESSinvalid compiler flag %sparameter count mismatch (%s)this FX API is not available in this part your program (%s)Unrecognized FX function call (%s)StatesDX9-style 'LHS = ' syntax is deprecated in strict modeValues%u%sunsupported compiler target '%s'the debug info flag can only be set globally%s shader fragments are not supportedDX9-style 'compile' syntax is deprecated in strict modeDX9-style '= sampler_state' syntax is deprecated in strict modecmctcrqkjciclchcoicexraxraixraoixrxrxoxxixiptrfclfcblsgbgsinternal error: not all rules initializedinternal error: Rule class id invalid$Params$ThisPointer[internal error]Zero character semantics aren't allowedSV_PrimitiveIdSV_InstanceIdcannot bind the same variable to multiple constants in the same constant bank@Pp ")""")pp
reduce literal lit instruction <| Explicitsymmetric cmp <| Explicitreduce mov instruction <| Explicitmin of known positive identity <| Explicitmax of known positive identity <| Explicitlt of known range reduction <| Explicitge of known range reduction <| Explicitatan of known 0 or 1 identity <| Explicitmul of a half times add of same value identity <| Explicitnegative bool less then another bool identity <| Explicitbool multiply chain reduction <| Explicitdot of partial nullity reduction <| Expliciteval mul <| Explicitmin(x,y) where range of one is <= the other (ieee safe version) <| Explicitmax(x,y) where range of one is >= the other (ieee safe version) <| Explicitcmp of negated bool identity <| Explicitcmp diff to basic logic identity <| ExplicitNegative values for cmp and clip can be rordered <| ExplicitNegative value compared with zero <| ExplicitSequence of compares <| ExplicitFRC of add with integer can bypass add <| ExplicitMulitply by 1 reduces to no-op move <| ExplicitMultiply by -1 reduces to NEG operation <| Explicitinteger add sequence simplification <| Explicitinteger multiply by one identity <| Explicitinteger multiply by zero identity <| Explicitinteger multiply by negative one identity <| Explicitinteger multiply by literal identity <| Explicitshift of commutative literals <| Explicitcombine of commutative literals <| Explicitshift of commutative inputs <| Explicitimin(x,y) where one is <= the other <| Explicitimax(x,y) where one is >= the other <| Explicitumin(x,y) where one is <= the other <| Explicitumax(x,y) where one is >= the other <| Explicitumod(x,y) where x < y <| ExplicitEval range add inf flag if range not bound <| ExplicitEval range add NaN flag if integer mask says it's possible <| Explicitpropagate range info through mov <| Explicitpropagate special floating point values through div <| Explicitpropagate special floating point values through log <| Explicitpropagate special floating point values through mul <| Explicitpropagate special floating point values through rsq <| Explicitpropagate special floating point values through rcp <| Explicitpropagate special floating point values through sqrt <| Explicitpropagate special floating point values through asin <| Explicitpropagate special floating point values through atan2 <| Explicit(A + L2) - (A + L1) = L2 - L1 if A non-NaN/Inf <| ExplicitDon't truncate double values to floats <| ExplicitDon't flush denorm values to zero <| ExplicitLiteral in Log * Mul * Exp pattern <| ExplicitAddition of same argument is same as multiply by 2 <| ExplicitMultiply by 2, 4, or 8 <| ExplicitMultiply by 0 reduces to literal 0 <| ExplicitA * (1/A) = 1 <| Explicitrange sequence reduction <| ExplicitKnown literals reduced to mov <| Explicitrsq result can be assumed positive <| Explicitmin(x,y) where range of one is <= the other <| Explicitmax(x,y) where range of one is >= the other <| ExplicitSimplify conditions on instructions which only care about sign on possibly NaN/Inf values <| ExplicitSimplify cmp sequences on possibly NaN/Inf values <| ExplicitSimplify pow on possibly NaN/Inf values <| ExplicitSimplify fractional add on possibly NaN/Inf values <| ExplicitCombineInstructions can create dots <| Explicitvectorize tunnel through mul <| Explicitvectorize tunnel through neg <| Explicitvectorize tunnel through add <| ExplicitChange swizzle of parameters to dot <| Explicitnegate modifier match <| Explicitsat instruction to sat modifier match <| Explicitabs instruction to abs modifier match <| Explicitinteger negate modifier match <| Explicitmax of neg idenity to abs instruction match <| ExplicitDon't use marker values for clamped literal conversions <| Explicitpropogate swizzles <| Explicitattempt to group scalar values read by similar instructions <| ExplicitEmit return instructions <| ExplicitEmit output arrays <| ExplicitTunnel through temp arrays on load <| Explicitinitialize arrays to void <| Explicitemit write masks on sample instructions <| Explicitreorder instructions to minimize register load <| ExplicitUse replicate swizzles to squish literal arrays <| ExplicitTry swizzling literal arrays to fit them together <| ExplicitTry to match temp array loads to their original store <| ExplicitRemove temp array stores that are immediately overwritten <| ExplicitTry to reduce known values to movs <| ExplicitTry to combine like instructions <| ExplicitRemove args for CBuffers that are never read <| ExplicitHoist predicated code into outermost predicate <| Explicitsearch for instancing opportunities in hull shaders <| Explicitenable instancing searches for programs with multiple outputs <| Explicitcombine simple instructions to reduce instruction count <| ExplicitCompact Registers - Paint  <| ExplicitCompact Registers - Press Moves <| ExplicitCompact Registers - Press Loop Ins <| ExplicitCompact Registers - Compress <| Explicitmov of sampler register reduction <| Explicitdetect errors induced by race conditions <| Explicitif(x){} else {...} -> if(!x) {...} <| Explicitif(x){...} else {} -> if(x) {...} <| Explicitif(x){...} if(x){...} -> if(x) {... ...} <| Explicitmovc(c,ignore,a) -> mov(a) <| MR.GenSimplifyInstructionsAlways_Bothmovc(c,a,ignore) -> mov(a) <| MR.GenSimplifyInstructionsAlways_Bothmovc(c,ignore,ignore) -> ignore(0) <| MR.GenSimplifyInstructionsAlways_Bothdmovc(c,ignore,a) -> dmov(a) <| MR.GenSimplifyInstructionsAlways_Bothdmovc(c,a,ignore) -> dmov(a) <| MR.GenSimplifyInstructionsAlways_Bothdmovc(c,ignore,ignore) -> ignore(0) <| MR.GenSimplifyInstructionsAlways_Bothbreak never match (to NOP) <| MR.GenSimplifyInstructionsAlways_Bothcontinue never match (to NOP) <| MR.GenSimplifyInstructionsAlways_Bothreturn never match (to NOP) <| MR.GenSimplifyInstructionsAlways_BothNOT BLT => BGE <| MR.GenSimplifyInstructionsOpt1_ExclNOT BGE => BLT <| MR.GenSimplifyInstructionsOpt1_ExclNOT BLT => BGE (safe) <| MR.GenSimplifyInstructionsOpt1_ExclNOT BGE => BLT (safe) <| MR.GenSimplifyInstructionsOpt1_ExclNOT BEQ => BNE <| MR.GenSimplifyInstructionsOpt1_ExclNOT BNE => BEQ <| MR.GenSimplifyInstructionsOpt1_ExclNOT BILT => BIGE <| MR.GenSimplifyInstructionsOpt1_ExclNOT BIGE => BILT <| MR.GenSimplifyInstructionsOpt1_ExclNOT BIEQ => BINE <| MR.GenSimplifyInstructionsOpt1_ExclNOT BINE => BIEQ <| MR.GenSimplifyInstructionsOpt1_ExclNOT BULT => BUGE <| MR.GenSimplifyInstructionsOpt1_ExclNOT BUGE => BULT <| MR.GenSimplifyInstructionsOpt1_Excla*(1/(b*a)) -> 1 / b <| MR.GenSimplifyInstructionsOpt1_Exclcombine AND of two equal unknown left shifts <| MR.GenSimplifyInstructionsOpt1_Exclcombine AND of two equal unknown right shifts <| MR.GenSimplifyInstructionsOpt1_Exclcombine AND of two equal unknown unsigned right shifts <| MR.GenSimplifyInstructionsOpt1_Exclback-propagate negate through iadd <| MR.GenSimplifyInstructionsOpt1_Exclback-propagate negate through imul <| MR.GenSimplifyInstructionsOpt1_Exclishl(ishl(a, b), c) : if( nooverflow_mod_32(b, c) ) -> ishl(a, iadd(b, c)) <| MR.GenSimplifyInstructionsOpt1_Exclushr(ishl(a, bv), cv) : if( ge_mod_32(cv, bv) ) -> and(ushr(a, cv - bv), (1 << (32-cv))-1) <| MR.GenSimplifyInstructionsOpt1_Exclishr(ishr(a, b), c) : if( nooverflow_mod_32(b, c) ) -> ishr(a, iadd(b, c)) <| MR.GenSimplifyInstructionsOpt1_Excl(a & b) | (a & c) -> and(a, b | c) <| MR.GenSimplifyInstructionsOpt1_Exclb | (a & c) | (a & d) -> or(b, and(a, or(c,d)) <| MR.GenSimplifyInstructionsOpt1_Excland(or(a, iv1), iv2) -> or(and(a, iv2), and(iv1, iv2)) <| MR.GenSimplifyInstructionsOpt1_Exclor(and(a, iv1), iv2) if(and_ne_zero(iv1, iv2) -> or(and(a, iv1 & ~iv2), iv2) <| MR.GenSimplifyInstructionsOpt1_Exclu/ishr/l(or(a, iv1), iv2) -> or(u/ishr/l(a, iv2), u/ishr/l(iv1, iv2)) <| MR.GenSimplifyInstructionsOpt1_Exclu/ishr/l(and(a, iv1), iv2) -> and(u/ishr/l(a, iv2), u/ishr/l(iv1, iv2)) <| MR.GenSimplifyInstructionsOpt1_Exclu/ishr/l(xor(a, iv1), iv2) -> xor(u/ishr/l(a, iv2), u/ishr/l(iv1, iv2)) <| MR.GenSimplifyInstructionsOpt1_Exclishl(imul(a, iv1), iv2) : if(low_bit_clear(iv2)) -> imul(ishl(a, iv2/2), ishl(iv1, iv2/2)) <| MR.GenSimplifyInstructionsOpt1_Exclishl(ineg(a), iv1) -> ineg(ishl(a, iv1)) <| MR.GenSimplifyInstructionsOpt1_Exclishl(iadd(a, iv1), iv2) -> iadd(ishl(a, iv2), ishl(iv1, iv2)) <| MR.GenSimplifyInstructionsOpt1_Exclushr(ushr(a, b), c) : if( nooverflow_mod_32(b, c) ) -> ushr(a, iadd(b, c)) <| MR.GenSimplifyInstructionsOpt1_Exclsplit literal sum ishl to allow literalization <| MR.GenSimplifyInstructionsOpt1_Exclsplit literal sum ishr to allow literalization <| MR.GenSimplifyInstructionsOpt1_Exclsplit literal sum ushr to allow literalization <| MR.GenSimplifyInstructionsOpt1_Excla = bfi(w, o, v, 0i) | r : if( mask_is_zero(w,o,r) ) -> bfi(w, o, v, r) <| MR.GenSimplifyInstructionsOpt1_Exclr | (a = bfi(w, o, v, 0i)) : if( mask_is_zero(w,o,r) ) -> bfi(w, o, v, r) <| MR.GenSimplifyInstructionsOpt1_Exclbfi(w, o, v, n) << s -> bfi(w, o+s, v, n) <| MR.GenSimplifyInstructionsOpt1_Exclubfe(w, o, a) >> s -> ubfe(w, o + s, a) <| MR.GenSimplifyInstructionsOpt1_Exclubfe(w, o, (a >> s) & m) : if( o + s < 32 ) -> ubfe(w, o + s, a & (m << s)) <| MR.GenSimplifyInstructionsOpt1_Exclibfe(w, o, (a >> s) & m) : if( o + s < 32 ) -> ibfe(w, o + s, a & (m << s)) <| MR.GenSimplifyInstructionsOpt1_Exclibfe(w, o, ((uint)a >> s) & m) : if( w + o + s < 32 ) -> ibfe(w, o + s, a & (m << s)) <| MR.GenSimplifyInstructionsOpt1_Excl-sin(x) -> sin(-x) <| MR.GenSimplifyInstructionsOpt1_Excl-dtof(x) -> dtof(-x) <| MR.GenSimplifyInstructionsOpt1_Excl-ftod(x) -> ftod(-x) <| MR.GenSimplifyInstructionsOpt1_Exclbfi(w, 0i, n, n) -> mov(n) <| MR.GenSimplifyInstructionsOpt1_NoExclbfi(w, o, v, bfi(w, o, 0, n)) -> bfi(w, o, v, n) <| MR.GenSimplifyInstructionsOpt1_NoExclbfi(w, o, v, n) << s -> bfi(w, o+s, v, n) <| MR.GenSimplifyInstructionsOpt1_NoExclbfi(w, 0, v, n << w) : if( w != 0 ) -> bfi(32-w, w, n, v) <| MR.GenSimplifyInstructionsOpt1_NoExcl(bfi(w, o, 0, n) | bfi(w, o, v, 0)) -> bfi(w, o, v, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(bfi(w, 0i, 0, n) | ubfe(w, 0i, v)) -> bfi(w, 0i, v, n) <| MR.GenSimplifyInstructionsOpt1_NoExclubfe(w, 0i, a) << o -> bfi(w, o, a, 0i) <| MR.GenSimplifyInstructionsOpt1_NoExclbfi(w, 0i, a, 0i) -> ubfe(w, 0i, a) <| MR.GenSimplifyInstructionsOpt1_NoExclubfe(w, 0i, a >> s) -> ubfe(w, s, a) <| MR.GenSimplifyInstructionsOpt1_NoExclubfe(w, o, a >> s) : if( o + s < 32 ) -> ubfe(w, o + s, a) <| MR.GenSimplifyInstructionsOpt1_NoExclibfe(w, o, a >> s) : if( o + s < 32 ) -> ibfe(w, o + s, a) <| MR.GenSimplifyInstructionsOpt1_NoExclibfe(w, o, (uint)a >> s) : if( o + s + w < 32 ) -> ibfe(w, o + s, a) <| MR.GenSimplifyInstructionsOpt1_NoExclubfe(w, o, a) >> s : if( o + s < 32 && w >= s ) -> ubfe(w - s, o + s, a) <| MR.GenSimplifyInstructionsOpt1_NoExclibfe(w, o, a) >> s : if( o + s < 32 && w >= s ) -> ibfe(w - s, o + s, a) <| MR.GenSimplifyInstructionsOpt1_NoExclb = ubfe(w, o, a); movc(b & (1 << (w - 1 + o)), b | ~((1 << w + o)-1), b) -> ibfe(w, o, a) <| MR.GenSimplifyInstructionsOpt1_NoExcla = bfi(w, o, v, 0i) | r : if( mask_is_zero(w,o,r) ) -> bfi(w, o, v, r) <| MR.GenSimplifyInstructionsOpt1_NoExcla = bfi(w, o, v, and(m, r)) : if( unmasked_is_one_or_val_is_zero(w,o,v,m) ) -> bfi(w, o, v, r) <| MR.GenSimplifyInstructionsOpt1_NoExcla = bfi(w, o, v, and(r, m)) : if( unmasked_is_one_or_val_is_zero(w,o,v,m) ) -> bfi(w, o, v, r) <| MR.GenSimplifyInstructionsOpt1_NoExcla = bfi(w, o, and(v, m), r) : if( masked_is_one(w,o,m) ) -> bfi(w, o, v, r) <| MR.GenSimplifyInstructionsOpt1_NoExcla = bfi(w, o, and(m, v), r) : if( masked_is_one(w,o,m) ) -> bfi(w, o, v, r) <| MR.GenSimplifyInstructionsOpt1_NoExclbfi(and(w,31), o, v, r) : if( lower_5_bits_are_set(31) ) -> bfi(w, o, v, r) <| MR.GenSimplifyInstructionsOpt1_NoExclbfi(and(31,w), o, v, r) : if( lower_5_bits_are_set(31) ) -> bfi(w, o, v, r) <| MR.GenSimplifyInstructionsOpt1_NoExclbfi(w, and(o,31), v, r) : if( lower_5_bits_are_set(31) ) -> bfi(w, o, v, r) <| MR.GenSimplifyInstructionsOpt1_NoExclbfi(w, and(31,o), v, r) : if( lower_5_bits_are_set(31) ) -> bfi(w, o, v, r) <| MR.GenSimplifyInstructionsOpt1_NoExclabs(a), a positive -> a <| MR.GenSimplifyInstructionsOpt1_NoExclabs(a), a negative -> neg(a) <| MR.GenSimplifyInstructionsOpt1_NoExclfrc(a + int) = frc(a) <| MR.GenSimplifyInstructionsOpt1_NoExcl$IsRound(fp int) = mov(fp int) <| MR.GenSimplifyInstructionsOpt1_NoExcladd of zero identity <| MR.GenSimplifyInstructionsOpt1_NoExcldouble add of zero identity <| MR.GenSimplifyInstructionsOpt1_NoExcladd of negative of itself identity <| MR.GenSimplifyInstructionsOpt1_NoExclLegacy (!A + A) => 1 + B <| MR.GenSimplifyInstructionsOpt1_NoExclLegacy !A + (A + B) => 1 + B <| MR.GenSimplifyInstructionsOpt1_NoExclLegacy C + (A * B) + (A * !B) => C + A <| MR.GenSimplifyInstructionsOpt1_NoExclLERP(!A,B,C) -> LERP(A, C, B) <| MR.GenSimplifyInstructionsOpt1_NoExcleval eq <| MR.GenSimplifyInstructionsOpt1_NoExcleval bne on non-nan value <| MR.GenSimplifyInstructionsOpt1_NoExcleval ge <| MR.GenSimplifyInstructionsOpt1_NoExclbinary expression with negative symmetry reduction <| MR.GenSimplifyInstructionsOpt1_NoExclbge(mul(x,x),neg(mul(x,x))) -> true <| MR.GenSimplifyInstructionsOpt1_NoExclIGE a,a -> true <| MR.GenSimplifyInstructionsOpt1_NoExclILT a,a -> false <| MR.GenSimplifyInstructionsOpt1_NoExclbine(ishl(a, n),0) : if(upper_n_bits_are_zero(a, n)) -> bine (a, 0) <| MR.GenSimplifyInstructionsOpt1_NoExclbine(i/ushr(a, n),0) : if(lower_n_bits_are_zero(a, n)) -> bine (a, 0) <| MR.GenSimplifyInstructionsOpt1_NoExcldtof(ftod(x)) -> mov(x) <| MR.GenSimplifyInstructionsOpt1_NoExcl(a != b) ? a : b -> a <| MR.GenSimplifyInstructionsOpt1_NoExcl(a != b) ? b : a -> b <| MR.GenSimplifyInstructionsOpt1_NoExcl(a == b) ? a : b -> b <| MR.GenSimplifyInstructionsOpt1_NoExcl(a == b) ? b : a -> a <| MR.GenSimplifyInstructionsOpt1_NoExcl(a == (b ? c : a)) : if (c != a) -> b == 0 <| MR.GenSimplifyInstructionsOpt1_NoExcl(a == (b ? a : c)) : if (c != a) -> b != 0 <| MR.GenSimplifyInstructionsOpt1_NoExclfirstbit*(x) != -1 -> x != 0 <| MR.GenSimplifyInstructionsOpt1_NoExclfirstbit*(x) == -1 -> x == 0 <| MR.GenSimplifyInstructionsOpt1_NoExclx ? firstbit*(x) : -1 -> firstbit*(x) <| MR.GenSimplifyInstructionsOpt1_NoExcl$IsAnyShift(x, and(y, 31)) <| MR.GenSimplifyInstructionsOpt1_NoExcl$IsAnyShift(x, and(31, y)) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(ishl(a, n),v1, v2) : if(upper_n_bits_are_zero(a, n)) -> movc (a, v1, v2) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(i/ushr(a, n),v1, v2) : if(lower_n_bits_are_zero(a, n)) -> movc (a, v1, v2) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(a, i/ushr/l(a, n), 0) -> i/ushr/l(a, n) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(a, b, i/ushr/l(a, n)) -> movc(a, b, 0) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(u/ishr/l(a, n), movc(a, b, c), d) -> movc(u/ishr/l(a, n), b, d) <| MR.GenSimplifyInstructionsOpt1_NoExclA+A REL L <| MR.GenSimplifyInstructionsOpt1_NoExclL REL A+A <| MR.GenSimplifyInstructionsOpt1_NoExclA*(L2>0) REL L <| MR.GenSimplifyInstructionsOpt1_NoExclL REL A*(L2>0) <| MR.GenSimplifyInstructionsOpt1_NoExclA*(L2<0) REL L <| MR.GenSimplifyInstructionsOpt1_NoExclL REL A*(L2<0) <| MR.GenSimplifyInstructionsOpt1_NoExclA+A REL L (double) <| MR.GenSimplifyInstructionsOpt1_NoExclL REL A+A (double) <| MR.GenSimplifyInstructionsOpt1_NoExclA*(L2>0) REL L (double) <| MR.GenSimplifyInstructionsOpt1_NoExclL REL A*(L2>0) (double) <| MR.GenSimplifyInstructionsOpt1_NoExclA*(L2<0) REL L (double) <| MR.GenSimplifyInstructionsOpt1_NoExclL REL A*(L2<0) (double) <| MR.GenSimplifyInstructionsOpt1_NoExclA*L2 REL L where L2 divides L as a UINT <| MR.GenSimplifyInstructionsOpt1_NoExclL REL A*L2 where L2 divides L as a UINT <| MR.GenSimplifyInstructionsOpt1_NoExclA*L2 REL L where L2 > 0 divides L as an INT <| MR.GenSimplifyInstructionsOpt1_NoExclL REL A*L2 where L2 > 0 divides L as an INT <| MR.GenSimplifyInstructionsOpt1_NoExclA*L2 REL L where L2 < 0 divides L as an INT <| MR.GenSimplifyInstructionsOpt1_NoExclL REL A*L2 where L2 < 0 divides L as an INT <| MR.GenSimplifyInstructionsOpt1_NoExcleval lt <| MR.GenSimplifyInstructionsOpt1_NoExclbtof -> movc <| MR.GenSimplifyInstructionsOpt1_NoExclbtoi -> movc <| MR.GenSimplifyInstructionsOpt1_NoExclUGE a,a -> true <| MR.GenSimplifyInstructionsOpt1_NoExclULT a,a -> false <| MR.GenSimplifyInstructionsOpt1_NoExclsimplify chain merges that bring in chain input <| MR.GenSimplifyInstructionsOpt1_NoExclsimplify chain merges that bring in chain input via mov right <| MR.GenSimplifyInstructionsOpt1_NoExclsimplify chain merges that bring in chain input via mov left <| MR.GenSimplifyInstructionsOpt1_NoExclclip(a+a,b) -> clip(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclclip(+d * a,b) -> clip(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclnullify clip ops on known positive values <| MR.GenSimplifyInstructionsOpt1_NoExclremove clips that are merged with known-success clips <| MR.GenSimplifyInstructionsOpt1_NoExclremove clip chains that are merged with known-success clips <| MR.GenSimplifyInstructionsOpt1_NoExclcmp(+d * a,b,c) -> cmp(a,b,c) <| MR.GenSimplifyInstructionsOpt1_NoExclcmp(-d * a,b,c) -> cmp(-a,b,c) <| MR.GenSimplifyInstructionsOpt1_NoExclcmp(-b,0,b) -> cmp(b,b,0) <| MR.GenSimplifyInstructionsOpt1_NoExclcmp of known positive identity <| MR.GenSimplifyInstructionsOpt1_NoExclcmp of known negative identity <| MR.GenSimplifyInstructionsOpt1_NoExclcmp(a+a,b,c) -> cmp(a,b,c) <| MR.GenSimplifyInstructionsOpt1_NoExclsymmetric cmp <| MR.GenSimplifyInstructionsOpt1_NoExclcmp(cmp(a, >=0, <0), b, c) -> cmp(a,b,c) <| MR.GenSimplifyInstructionsOpt1_NoExclcmp(cmp(a, <0, >=0), b, c) -> cmp(a,c,b) <| MR.GenSimplifyInstructionsOpt1_NoExclcmp(-cmp(a, <=0, >0), b, c) -> cmp(a,b,c) <| MR.GenSimplifyInstructionsOpt1_NoExclcmp(-cmp(a, >0, <=0), b, c) -> cmp(a,c,b) <| MR.GenSimplifyInstructionsOpt1_NoExclLegacy NOT (A || A) => NOT A <| MR.GenSimplifyInstructionsOpt1_NoExclCMP(c,d=1+CMP(c,a,b),f) -> CMP(c,1+a,f) <| MR.GenSimplifyInstructionsOpt1_NoExclnullify discard ops on known false values <| MR.GenSimplifyInstructionsOpt1_NoExclremove discards that are merged with known-success discards <| MR.GenSimplifyInstructionsOpt1_NoExclremove discard chains that are merged with known-success discards <| MR.GenSimplifyInstructionsOpt1_NoExcldivision by a literal becomes multiplication by reciprocal <| MR.GenSimplifyInstructionsOpt1_NoExcl1 / x -> rcp(x) <| MR.GenSimplifyInstructionsOpt1_NoExcldot(normalized_v, normalized_v) == 1.0 when v has length <| MR.GenSimplifyInstructionsOpt1_NoExclexp(log(x)) identity <| MR.GenSimplifyInstructionsOpt1_NoExclftob(trunc(btof(x))) -> mov(x) <| MR.GenSimplifyInstructionsOpt1_NoExclftoi(itof(x)) -> mov(x) <| MR.GenSimplifyInstructionsOpt1_NoExclftoi(trunc(itof(x))) -> mov(x) <| MR.GenSimplifyInstructionsOpt1_NoExclftou(utof(x)) -> mov(x) <| MR.GenSimplifyInstructionsOpt1_NoExclftou(trunc(utof(x))) -> mov(x) <| MR.GenSimplifyInstructionsOpt1_NoExclLegacy NOT GE => LT <| MR.GenSimplifyInstructionsOpt1_NoExclLegacy NOT LT => GE <| MR.GenSimplifyInstructionsOpt1_NoExcliadd zero reduces to no-op mov <| MR.GenSimplifyInstructionsOpt1_NoExclInteger addition negative identities <| MR.GenSimplifyInstructionsOpt1_NoExcliadd(a, b) : if( and_is_zero(a, b) ) -> or(a, b) <| MR.GenSimplifyInstructionsOpt1_NoExclif(bine(x,0)) -> if(x) <| MR.GenSimplifyInstructionsOpt1_NoExclimul one reduces to no-op mov <| MR.GenSimplifyInstructionsOpt1_NoExclineg(and(ne(x,0),1)) -> ne(x,0) <| MR.GenSimplifyInstructionsOpt1_NoExclineg(ineg(x)) -> mov(x) <| MR.GenSimplifyInstructionsOpt1_NoExclu/ishl/r(a, 0) -> mov(a) <| MR.GenSimplifyInstructionsOpt1_NoExcl((a >> ov1) << o2) : if( ov1 == o2 ) -> and(a, ~((1 << ov1)-1)) <| MR.GenSimplifyInstructionsOpt1_NoExclu/ishr(or(a, m), n) : if( or_is_identity_ignore_lower_n_bits(a, m, n) -> u/ishr(a, n) <| MR.GenSimplifyInstructionsOpt1_NoExclu/ishr(or(m, a), n) : if( or_is_identity_ignore_lower_n_bits(a, m, n) -> u/ishr(a, n) <| MR.GenSimplifyInstructionsOpt1_NoExclu/ishr(and(a, m), n) : if( and_is_identity_ignore_lower_n_bits(a, m, n) -> u/ishr(a, n) <| MR.GenSimplifyInstructionsOpt1_NoExclu/ishr(and(m, a), n) : if( and_is_identity_ignore_lower_n_bits(a, m, n) -> u/ishr(a, n) <| MR.GenSimplifyInstructionsOpt1_NoExclishl(or(a, m), n) : if( or_is_identity_ignore_upper_n_bits(a, m, n) -> ishl(a, n) <| MR.GenSimplifyInstructionsOpt1_NoExclishl(or(m, a), n) : if( or_is_identity_ignore_upper_n_bits(a, m, n) -> ishl(a, n) <| MR.GenSimplifyInstructionsOpt1_NoExclishl(and(a, m), n) : if( and_is_identity_ignore_upper_n_bits(a, m, n) -> ishl(a, n) <| MR.GenSimplifyInstructionsOpt1_NoExclishl(and(m, a), n) : if( and_is_identity_ignore_upper_n_bits(a, m, n) -> ishl(a, n) <| MR.GenSimplifyInstructionsOpt1_NoExclimul(ishl(iv1, a), iv2) -> ishl(imul(iv1, iv2), a) <| MR.GenSimplifyInstructionsOpt1_NoExclA + B for boolean A & B -> OR A, B <| MR.GenSimplifyInstructionsOpt1_NoExclA * B for boolean A & B -> AND A, B <| MR.GenSimplifyInstructionsOpt1_NoExclitob(x) -> bine(x,0) <| MR.GenSimplifyInstructionsOpt1_NoExclitof(ftoi(x)) -> trunc(x) <| MR.GenSimplifyInstructionsOpt1_NoExcllog(exp(x)) identity <| MR.GenSimplifyInstructionsOpt1_NoExclexp(a*log(0)) = 0 identity <| MR.GenSimplifyInstructionsOpt1_NoExclLegacy -BOOL < BOOL => BOOL <| MR.GenSimplifyInstructionsOpt1_NoExclLegacy (A || A) => A <| MR.GenSimplifyInstructionsOpt1_NoExclmax(i0, i1): if (i0 >= i1) -> mov(i0) <| MR.GenSimplifyInstructionsOpt1_NoExclmax(i0, i1): if (i1 >= i0) -> mov(i1) <| MR.GenSimplifyInstructionsOpt1_NoExclmax(max(i0, l1), l2) -> max(i0, max(l1, l2)) <| MR.GenSimplifyInstructionsOpt1_NoExcldmax(i0, i1): if (i0 >= i1) -> mov(i0) <| MR.GenSimplifyInstructionsOpt1_NoExcldmax(i0, i1): if (i1 >= i0) -> mov(i1) <| MR.GenSimplifyInstructionsOpt1_NoExcldmax(dmax(i0, l1), l2) -> dmax(i0, dmax(l1, l2)) <| MR.GenSimplifyInstructionsOpt1_NoExclimax(i0, i1): if (i0 >= i1) -> mov(i0) <| MR.GenSimplifyInstructionsOpt1_NoExclimax(i0, i1): if (i1 >= i0) -> mov(i1) <| MR.GenSimplifyInstructionsOpt1_NoExclimax(imax(i0, l1), l2) -> imax(i0, imax(l1, l2)) <| MR.GenSimplifyInstructionsOpt1_NoExclumax(i0, i1): if (i0 >= i1) -> mov(i0) <| MR.GenSimplifyInstructionsOpt1_NoExclumax(i0, i1): if (i1 >= i0) -> mov(i1) <| MR.GenSimplifyInstructionsOpt1_NoExclumax(umax(i0, l1), l2) -> umax(i0, umax(l1, l2)) <| MR.GenSimplifyInstructionsOpt1_NoExclmin(i0, i1): if (i0 >= i1) -> mov(i1) <| MR.GenSimplifyInstructionsOpt1_NoExclmin(i0, i1): if (i1 >= i0) -> mov(i0) <| MR.GenSimplifyInstructionsOpt1_NoExclmin(min(i0, l1), l2) -> min(i0, min(l1, l2)) <| MR.GenSimplifyInstructionsOpt1_NoExcldmin(i0, i1): if (i0 >= i1) -> mov(i1) <| MR.GenSimplifyInstructionsOpt1_NoExcldmin(i0, i1): if (i1 >= i0) -> mov(i0) <| MR.GenSimplifyInstructionsOpt1_NoExcldmin(dmin(i0, l1), l2) -> dmin(i0, dmin(l1, l2)) <| MR.GenSimplifyInstructionsOpt1_NoExclimin(i0, i1): if (i0 >= i1) -> mov(i1) <| MR.GenSimplifyInstructionsOpt1_NoExclimin(i0, i1): if (i1 >= i0) -> mov(i0) <| MR.GenSimplifyInstructionsOpt1_NoExclimin(imin(i0, l1), l2) -> imin(i0, imin(l1, l2)) <| MR.GenSimplifyInstructionsOpt1_NoExclumin(i0, i1): if (i0 >= i1) -> mov(i1) <| MR.GenSimplifyInstructionsOpt1_NoExclumin(i0, i1): if (i1 >= i0) -> mov(i0) <| MR.GenSimplifyInstructionsOpt1_NoExclumin(umin(i0, l1), l2) -> umin(i0, umin(l1, l2)) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(a,true,false) -> bine(a, 0) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(a,false,true) -> bieq(a, 0) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(true,b,c) -> mov(b) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(false,b,c) -> mov(c) <| MR.GenSimplifyInstructionsOpt1_NoExcldmovc(true,b,c) -> dmov(b) <| MR.GenSimplifyInstructionsOpt1_NoExcldmovc(false,b,c) -> dmov(c) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(a, true, b) -> or(a, b) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc and comparison sequence reductions <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(a, b, movc(c, b, d)) -> movc(or(a, c), b, d) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(a, b, and(c, b)) -> and(or(a, c), b) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(a, and(b, c), 0) -> and(and(a, b), c) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(!a,b,c) -> movc(a,c,b) <| MR.GenSimplifyInstructionsOpt1_NoExcldmovc(!a,b,c) -> dmovc(a,c,b) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(movc(a,TRUE,FALSE),b,c) -> movc(a,b,c) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(movc(a,FALSE,TRUE),b,c) -> movc(a,c,b) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(bool b, TRUE, FALSE) -> mov b <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(bool b, FALSE, TRUE) -> not b <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(bool b, TRUE, bool c) -> or(b,c) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(bool b, bool b, false) -> mov b <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(b, a, b) -> movc (b, a, 0) <| MR.GenSimplifyInstructionsOpt1_NoExcl(n > i) ? X : umin(n, i) -> (i > n) ? X: i <| MR.GenSimplifyInstructionsOpt1_NoExclbool ? a + 1 : a -> a - bool <| MR.GenSimplifyInstructionsOpt1_NoExclbool ? a - 1 : a -> a + bool <| MR.GenSimplifyInstructionsOpt1_NoExcl(n > i) ? X : imin(n, i) -> (i > n) ? X: i <| MR.GenSimplifyInstructionsOpt1_NoExcl(n > i) ? X : min(n, i) -> (i > n) ? X: i <| MR.GenSimplifyInstructionsOpt1_NoExcl(n > i) ? X : dmin(n, i) -> (i > n) ? X: i <| MR.GenSimplifyInstructionsOpt1_NoExcl(V < n) ? V : n -> min(V, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(V < n) ? (V+1) : n -> min(V+1, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(n >= V) ? V : n -> min(V, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(V < n) ? V : n -> dmin(V, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(V < n) ? (V+1) : n -> dmin(V+1, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(n >= V) ? V : n -> dmin(V, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(0 < n) ? 1 : 0 -> umin(1, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(V < n) ? V : n -> umin(V, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(V < n) ? (V+1) : n -> umin(V+1, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(n >= V) ? V : n -> umin(V, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(V < n) ? V : n -> imin(V, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(V < n) ? (V+1) : n -> imin(V+1, n) <| MR.GenSimplifyInstructionsOpt1_NoExcl(n >= V) ? V : n -> imin(V, n) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(a,b,b) -> mov(b) <| MR.GenSimplifyInstructionsOpt1_NoExcldmovc(a,b,b) -> dmov(b) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc((a min(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclinteger movc((a min(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclunsigned integer movc((a min(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExcldmovc((a dmin(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc((a max(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclinteger movc((a max(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclunsigned integer movc((a max(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExcldmovc((a dmax(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc((a>=b),a,b) -> max(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclinteger movc((a>=b),a,b) -> max(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclunsigned integer movc((a>=b),a,b) -> max(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExcldmovc((a>=b),a,b) -> dmax(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc((a>=b),b,a) -> min(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclinteger movc((a>=b),b,a) -> min(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclunsigned integer movc((a>=b),b,a) -> min(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExcldmovc((a>=b),b,a) -> dmin(a,b) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(c,d=movc(c,a,b),f) -> movc(c,a,f) <| MR.GenSimplifyInstructionsOpt1_NoExclmovc(c,f,d=movc(c,a,b)) -> movc(c,f,b) <| MR.GenSimplifyInstructionsOpt1_NoExclcmp(c,d=cmp(c,a,b),f) -> cmp(c,a,f) <| MR.GenSimplifyInstructionsOpt1_NoExclcmp(c,f,d=cmp(c,a,b)) -> cmp(c,f,b) <| MR.GenSimplifyInstructionsOpt1_NoExclmul of one identity <| MR.GenSimplifyInstructionsOpt1_NoExclmul of double one identity <| MR.GenSimplifyInstructionsOpt1_NoExcl(A + A) * 0.5 -> no-op mov of A <| MR.GenSimplifyInstructionsOpt1_NoExclmul of a number times its inverse identity <| MR.GenSimplifyInstructionsOpt1_NoExclA * B/A with negative variations on A <| MR.GenSimplifyInstructionsOpt1_NoExclnormalize(normalize(v)) -> normalize(v) <| MR.GenSimplifyInstructionsOpt1_NoExclLegacy !A * (A + B) => !A * B <| MR.GenSimplifyInstructionsOpt1_NoExclLegacy A * !(A * B) => A * !B <| MR.GenSimplifyInstructionsOpt1_NoExclLegacy (!A * A) => 0 <| MR.GenSimplifyInstructionsOpt1_NoExclB*!(A * -B + B) -> A * B <| MR.GenSimplifyInstructionsOpt1_NoExcldouble negative to original <| MR.GenSimplifyInstructionsOpt1_NoExclor(ine(x,0),ine(y,0)) -> ine(or(x,y),0) <| MR.GenSimplifyInstructionsOpt1_NoExclcombine OR of two equal shifts <| MR.GenSimplifyInstructionsOpt1_NoExclcombine XOR of two equal shifts <| MR.GenSimplifyInstructionsOpt1_NoExclX AND ~X => 0 <| MR.GenSimplifyInstructionsOpt1_NoExclX AND Y : if( and_is_identity(x,y) => X <| MR.GenSimplifyInstructionsOpt1_NoExclX AND Y : if( and_is_identity(y,x) => Y <| MR.GenSimplifyInstructionsOpt1_NoExcland(and(a, b), c) : if( and_is_identity(c, b) ) -> and(a, c) <| MR.GenSimplifyInstructionsOpt1_NoExcland(and(b, a), c) : if( and_is_identity(c, b) ) -> and(a, c) <| MR.GenSimplifyInstructionsOpt1_NoExcland(a, iv2) : if( can_reduce_and(a, iv2) ) -> and(a, get_reduced_and(a, iv2)) <| MR.GenSimplifyInstructionsOpt1_NoExclX OR ~X => btrue <| MR.GenSimplifyInstructionsOpt1_NoExclX OR Y : if( or_is_identity(x,y) => X <| MR.GenSimplifyInstructionsOpt1_NoExclX OR Y : if( or_is_identity(y,x) => Y <| MR.GenSimplifyInstructionsOpt1_NoExclor(a, iv2) : if( can_reduce_or(a, iv2) ) -> or(a, get_reduced_or(a, iv2)) <| MR.GenSimplifyInstructionsOpt1_NoExclor(or(a, b), c) : if( or_is_identity(c, b) ) -> or(a, c) <| MR.GenSimplifyInstructionsOpt1_NoExclor(or(b, a), c) : if( or_is_identity(c, b) ) -> or(a, c) <| MR.GenSimplifyInstructionsOpt1_NoExcldouble rcp identity <| MR.GenSimplifyInstructionsOpt1_NoExclrcp(mul(x, rsq(x)) = rsq(x) identity <| MR.GenSimplifyInstructionsOpt1_NoExclrsq(x) * rsq(x) -> rcp(x) <| MR.GenSimplifyInstructionsOpt1_NoExclrsq(x) * rsq(x) -> rcp(x) for positive x <| MR.GenSimplifyInstructionsOpt1_NoExcl1 / sqrt(x) -> rsq(x) <| MR.GenSimplifyInstructionsOpt1_NoExclsqrt times sqrt of positive value equals the original value identity <| MR.GenSimplifyInstructionsOpt1_NoExclpositive sqrt(x*x) identity <| MR.GenSimplifyInstructionsOpt1_NoExclconvert mod by power-of-2 to bitwise AND <| MR.GenSimplifyInstructionsOpt1_NoExclutof(sampleinfo_uint(x)) -> sampleinfo(x) <| MR.GenSimplifyInstructionsOpt1_NoExclxor(xor(a, iv1), iv2) -> xor(a, xor(iv1, iv2)) <| MR.GenSimplifyInstructionsOpt1_NoExclreplace bitwise double-complement with move <| MR.GenSimplifyInstructionsOpt1_NoExclbine(b,0) -> b <| MR.GenSimplifyInstructionsOpt2_NoExclmovc(bool,x,0) -> and(bool,x) <| MR.GenSimplifyInstructionsOpt2_NoExclutof(sampleinfo_uint_rt(x)) -> sampleinfo_rt(x) <| MR.GenSimplifyInstructionsSampleMask_Bothmovc, unary_compute on values lhs -> unary_compute, movc <| MR.GenShuffleCompute_Exclmovc, unary_compute on values rhs -> unary_compute, movc <| MR.GenShuffleCompute_Exclcmp, unary_compute on values lhs -> unary_compute, cmp <| MR.GenShuffleCompute_Exclcmp, unary_compute on values rhs -> unary_compute, cmp <| MR.GenShuffleCompute_Exclmovc, binary_compute on values lhs -> binary_compute, movc <| MR.GenShuffleCompute_Exclmovc, binary_compute on values rhs -> binary_compute, movc <| MR.GenShuffleCompute_Exclcmp, binary_compute on values lhs -> binary_compute, cmp <| MR.GenShuffleCompute_Exclcmp, binary_compute on values rhs -> binary_compute, cmp <| MR.GenShuffleCompute_Exclmovc, ternary arg1 on values lhs -> ternary, movc <| MR.GenShuffleCompute_Exclmovc, ternary arg1 on values rhs -> ternary, movc <| MR.GenShuffleCompute_Exclmovc, ternary arg2 on values lhs -> ternary, movc <| MR.GenShuffleCompute_Exclmovc, ternary arg2 on values rhs -> ternary, movc <| MR.GenShuffleCompute_Exclmovc, ternary arg3 on values lhs -> ternary, movc <| MR.GenShuffleCompute_Exclmovc, ternary arg3 on values rhs -> ternary, movc <| MR.GenShuffleCompute_Exclmovc, quat arg1 on values lhs -> quat, movc <| MR.GenShuffleCompute_Exclmovc, quat arg1 on values rhs -> quat, movc <| MR.GenShuffleCompute_Exclmovc, quat arg2 on values lhs -> quat, movc <| MR.GenShuffleCompute_Exclmovc, quat arg2 on values rhs -> quat, movc <| MR.GenShuffleCompute_Exclmovc, quat arg3 on values lhs -> quat, movc <| MR.GenShuffleCompute_Exclmovc, quat arg3 on values rhs -> quat, movc <| MR.GenShuffleCompute_Exclmovc, quat arg4 on values lhs -> quat, movc <| MR.GenShuffleCompute_Exclmovc, quat arg4 on values rhs -> quat, movc <| MR.GenShuffleCompute_Exclmovc, unary_compute on values -> unary_compute, movc <| MR.GenShuffleCompute_NoExclcmp, unary_compute on values -> unary_compute, cmp <| MR.GenShuffleCompute_NoExcland, unary_compute on values -> unary_compute, and <| MR.GenShuffleCompute_NoExclmovc, binary_compute on values -> binary_compute, movc <| MR.GenShuffleCompute_NoExclmovc, binary_compute on same value -> binary_compute, movc <| MR.GenShuffleCompute_NoExclcmp, binary_compute on values -> binary_compute, cmp <| MR.GenShuffleCompute_NoExclcmp, binary_compute on same value -> binary_compute, cmp <| MR.GenShuffleCompute_NoExcland, binary_compute on values -> binary_compute, and <| MR.GenShuffleCompute_NoExclmovc, ternary arg1 on values -> ternary, movc <| MR.GenShuffleCompute_NoExclmovc, ternary arg2 on values -> ternary, movc <| MR.GenShuffleCompute_NoExclmovc, ternary arg3 on values -> ternary, movc <| MR.GenShuffleCompute_NoExcland, ternary arg1 on values -> ternary, movc <| MR.GenShuffleCompute_NoExcland, ternary arg2 on values -> ternary, movc <| MR.GenShuffleCompute_NoExcland, ternary arg3 on values -> ternary, movc <| MR.GenShuffleCompute_NoExclmovc, quat arg1 on values -> quat, movc <| MR.GenShuffleCompute_NoExclmovc, quat arg2 on values -> quat, movc <| MR.GenShuffleCompute_NoExclmovc, quat arg3 on values -> quat, movc <| MR.GenShuffleCompute_NoExclmovc, quat arg4 on values -> quat, movc <| MR.GenShuffleCompute_NoExcland, quat arg1 on values -> quat, movc <| MR.GenShuffleCompute_NoExcland, quat arg2 on values -> quat, movc <| MR.GenShuffleCompute_NoExcland, quat arg3 on values -> quat, movc <| MR.GenShuffleCompute_NoExcland, quat arg4 on values -> quat, movc <| MR.GenShuffleCompute_NoExclmad match 1 (a + b*c) <| MR.GenMadmad match 2 (a - b*c) <| MR.GenMadmad match 3 (a + b+b) <| MR.GenMadmad match 4 (a - b+b) <| MR.GenMadimad match 1 (a + b*c) <| MR.GenMadimad match 2 (a + b+b) <| MR.GenMada << L | b (bfi(w=32-L, o=L, a, b) if( mask_is_zero(w, o, b) && allbutwidth_is_zero(w, a) -> imad (a, 1 << L, B) <| MR.GenMadif+lt -> if_lt <| MR.Gen_PreModTarget_Bothif+ge -> if_ge <| MR.Gen_PreModTarget_Bothif+cmp_lt -> if_lt <| MR.Gen_PreModTarget_Bothif+cmp_ge -> if_ge <| MR.Gen_PreModTarget_Bothif+cmp_lt0 -> if_lt0 <| MR.Gen_PreModTarget_Bothif+cmp_ge0 -> if_ge0 <| MR.Gen_PreModTarget_Bothif_lt(neg(abs(x)), 0) -> if_ne0 <| MR.Gen_PreModTarget_Bothif_ge(neg(abs(x)), 0) -> if_eq0 <| MR.Gen_PreModTarget_Bothif_lt(-a^2,a^2) -> if_ne(a,0) <| MR.Gen_PreModTarget_Bothif_ge(-a^2,a^2) -> if_eq(a,0) <| MR.Gen_PreModTarget_Bothif_ne(x, 0) -> if_ne(x, -x) <| MR.Gen_PreModTarget_Bothif_ge(x + y, 0) -> if_ge(x, -y) <| MR.Gen_PreModTarget_Bothif_lt(x + y, 0) -> if_lt(x, -y) <| MR.Gen_PreModTarget_Bothif_ne(x + y, 0) -> if_ne(x, -y) <| MR.Gen_PreModTarget_Bothif_eq(x + y, 0) -> if_eq(x, -y) <| MR.Gen_PreModTarget_Bothbreak(a,not(x)) -> breakn(a,x) <| MR.Gen_PreModTarget_Bothcontinue(a,not(x)) -> continuen(a,x) <| MR.Gen_PreModTarget_Bothreturn(a,not(x)) -> returnn(a,x) <| MR.Gen_PreModTarget_Bothbreak(a,bieq(x,0)) -> breakn(a,x) <| MR.Gen_PreModTarget_Bothcontinue(a,bieq(x,0)) -> continuen(a,x) <| MR.Gen_PreModTarget_Bothreturn(a,bieq(x,0)) -> returnn(a,x) <| MR.Gen_PreModTarget_Bothbreak(a,bine(x)) -> break(a,x) <| MR.Gen_PreModTarget_Bothcontinue(a,bine(x)) -> continue(a,x) <| MR.Gen_PreModTarget_Bothreturn(a,bine(x)) -> return(a,x) <| MR.Gen_PreModTarget_Bothbreak(ge(neg(fbool), fbool)) -> break_eq(fbool, 0) <| MR.Gen_PreModTarget_BothBREAK_GE i2,i1 short form <| MR.Gen_PreModTarget_BothBREAK_GE i2,i1 for targets that use CMP <| MR.Gen_PreModTarget_BothBREAK_GE i2,-iv1 where iv1 is literal and needs to be negated before using <| MR.Gen_PreModTarget_BothBREAK_LT i2,i1 short form <| MR.Gen_PreModTarget_BothBREAK_LT i2,i1 for targets that use CMP <| MR.Gen_PreModTarget_BothBREAK_LT i2,-iv1 where iv1 is literal and needs to be negated before using <| MR.Gen_PreModTarget_BothBREAK_EQ i2,i1 <| MR.Gen_PreModTarget_BothBREAK_EQ i2,i1 matches when CMP is used <| MR.Gen_PreModTarget_BothBREAK_EQ i2,-iv1 where iv1 is literal and has to be negated <| MR.Gen_PreModTarget_BothBREAK_EQ i2,-iv1 where iv1 is literal and has to be negated, CMP form <| MR.Gen_PreModTarget_BothBREAK_NE i2,i1 <| MR.Gen_PreModTarget_BothBREAK_NE i2,i1 with CMP <| MR.Gen_PreModTarget_BothBREAK_NE i2,-iv1 where iv1 is literal and has to be negated <| MR.Gen_PreModTarget_BothBREAK_NE i2,-iv1 where iv1 is literal and has to be negated, CMP form <| MR.Gen_PreModTarget_Bothmovc(blt(a, 0), |a|, a) -> abs(a) <| MR.GenD3D10PreMod_NoExcldmovc(bdlt(a, 0), |a|, a) -> dabs(a) <| MR.GenD3D10PreMod_NoExclbreaka match <| MR.GenD3D10PostMod_Bothcontinuea match <| MR.GenD3D10PostMod_Bothreturna match <| MR.GenD3D10PostMod_Bothif(bult(0,x)) -> if(x) <| MR.GenD3D10PostMod_Bothif(bilt(0,x)) -> if(x) <| MR.GenD3D10PostMod_Bothif(bieq(x,0)) -> ifn(x) <| MR.GenD3D10PostMod_Bothif(bine(x,0)) -> if(x) <| MR.GenD3D10PostMod_Bothif(!a) -> ifn(a) <| MR.GenD3D10PostMod_Bothbfi(w, 0i, v, r) : if( width_is_zero(w,r) && allbutwidth_is_zero(w, v) -> iadd(v, r) <| MR.GenD3D10PostMod_Bothor(a, b) : if( and_is_zero(a, b) ) -> iadd(a, b) <| MR.GenD3D10PostMod_Bothdiv(a,b)->mul(a, rcp(b)) <| MR.Gen_RequiredTranslatelt(a, b) -> cmp(a - b, 0f, 1f) <| MR.Gen_RequiredTranslatege(a, b) -> cmp(a - b, 1f, 0f) <| MR.Gen_RequiredTranslatemax(a, -a) -> abs <| MR.Gen_RequiredTranslatemax(a, b) -> cmp(a - b, a, b) <| MR.Gen_RequiredTranslatemin(a, b) -> cmp(a - b, b, a) <| MR.Gen_RequiredTranslatedmad -> dmul, dadd <| MR.Gen_RequiredTranslatecountbits(i) -> and/shift/add sequence <| MR.Gen_RequiredTranslatefirstbitlow(i) -> shift/bine/add sequence <| MR.Gen_RequiredTranslatefirstbit_shi(i) -> shift/bine/add sequence <| MR.Gen_RequiredTranslatefirstbit_hi(i) -> shift/bine/add sequence <| MR.Gen_RequiredTranslatereversebits(i) -> and/shift/or sequence <| MR.Gen_RequiredTranslatef32tof16(i) -> conversion sequence <| MR.Gen_RequiredTranslatef16tof32(i) -> conversion sequence <| MR.Gen_RequiredTranslateubfe(i) -> extraction sequence <| MR.Gen_RequiredTranslateibfe(i) -> extraction sequence <| MR.Gen_RequiredTranslatebfi(i) -> insertion sequence <| MR.Gen_RequiredTranslatepreshader abs -> max(i, neg(i)) <| MR.Gen_RequiredTranslate_Preshaderpreshader sat -> min(max(i, 0), 1) <| MR.Gen_RequiredTranslate_Preshadercmp sequence 1 -> sat <| MR.Gen_OptimizeEarlyTranslate_SAT_NoExclcmp sequence 2 -> sat <| MR.Gen_OptimizeEarlyTranslate_SAT_NoExclpos cmp sequence -> sat <| MR.Gen_OptimizeEarlyTranslate_SAT_NoExclmax(i, neg(i)) -> abs <| MR.Gen_OptimizeEarlyTranslate_SAT_NoExcldmax(i, dneg(i)) -> dabs <| MR.Gen_OptimizeEarlyTranslate_SAT_NoExclcmp (a, a, -a) -> abs <| MR.Gen_OptimizeEarlyTranslate_SAT_NoExclmin 1/max 0 -> sat <| MR.Gen_OptimizeEarlyTranslate_SAT_Exclmax 0/min 1 -> sat <| MR.Gen_OptimizeEarlyTranslate_SAT_Excldmin 1/dmax 0 -> dsat <| MR.Gen_OptimizeEarlyTranslate_SAT_Excldmax 0/dmin 1 -> dsat <| MR.Gen_OptimizeEarlyTranslate_SAT_Excl(n & a) | r : if( known_bfi_bitmask_noshift(n,a,r) && and_is_zero(n,r) ) -> bfi(bfi_bitwidth_noshift(n,a,r), 0i, a, r) <| MR.GenD3D10_OptimizeEarlyTranslate_Excl(a & n) | r : if( known_bfi_bitmask_noshift(n,a,r) && and_is_zero(n,r) ) -> bfi(bfi_bitwidth_noshift(n,a,r), 0i, a, r) <| MR.GenD3D10_OptimizeEarlyTranslate_Exclr | (n & a) : if( known_bfi_bitmask_noshift(n,a,r) && and_is_zero(n,r) ) -> bfi(bfi_bitwidth_noshift(n,a,r), 0i, a, r) <| MR.GenD3D10_OptimizeEarlyTranslate_Exclr | (a & n) : if( known_bfi_bitmask_noshift(n,a,r) && and_is_zero(n,r) ) -> bfi(bfi_bitwidth_noshift(n,a,r), 0i, a, r) <| MR.GenD3D10_OptimizeEarlyTranslate_Excla | r : if( known_bfi_bitmask_noshift_impmask(a,r) && and_is_zero(a,r) ) -> bfi(bfi_bitwidth_noshift_impmask(a,r), 0i, a, r) <| MR.GenD3D10_OptimizeEarlyTranslate_Exclr | a : if( known_bfi_bitmask_noshift_impmask(a,r) && and_is_zero(a,r) ) -> bfi(bfi_bitwidth_noshift_impmask(a,r), 0i, a, r) <| MR.GenD3D10_OptimizeEarlyTranslate_Excl((a << m) & n) | i : if( known_bfi_bitmask_postshift_ignore(n,a,m,i) ) -> bfi(bfi_bitwidth_postshift_ignore(n,a,m,i), m, a, 0i) <| MR.GenD3D10_OptimizeEarlyTranslate_Exclimul(a, iv_pow2) -> ishl(a, get_lowest_bit(iv_pow2)) <| MR.GenD3D10_OptimizeEarlyTranslateudiv(a, iv_pow2) -> ushr(a, get_lowest_bit(iv_pow2)) <| MR.GenD3D10_OptimizeEarlyTranslate(a << n) >> (m) -> ibfe(32-m, m-n, a) <| MR.GenD3D10_OptimizeEarlyTranslateb = ubfe/ushr(a,o), movc((b >> o) & iv_pow2, bfi(w, 0, b, -iv_pow2)) -> ibfe(get_first_bit(iv_pow2), 0, a) <| MR.GenD3D10_OptimizeEarlyTranslateb = ubfe/ushr(a,o), movc((a >> o) & iv_pow2, b | -iv_pow2) -> ibfe(get_first_bit(iv_pow2), 0, a) <| MR.GenD3D10_OptimizeEarlyTranslatemovc(b & iv_pow2, bfi(w, 0, b, -iv_pow2), b) -> ibfe(get_first_bit(iv_pow2), 0, b) <| MR.GenD3D10_OptimizeEarlyTranslatemovc(b & iv_pow2, bfi(w, 0, (b & m), -iv_pow2)) -> ibfe(get_first_bit(iv_pow2), 0, (b&m)) <| MR.GenD3D10_OptimizeEarlyTranslatemovc(b & iv_pow2, b | -iv_pow2, b) -> ibfe(get_first_bit(iv_pow2), 0, b) <| MR.GenD3D10_OptimizeEarlyTranslatemovc(b & iv_pow2, (b & m) | -iv_pow2, b) -> ibfe(get_first_bit(iv_pow2), 0, (b&m)) <| MR.GenD3D10_OptimizeEarlyTranslate(a << n) >> (m) -> ubfe(32-m, m-n, a) <| MR.GenD3D10_OptimizeEarlyTranslate(a & ((iv_pow2 << n) - 1)) -> bfi(iv_pow2 + n, 0, a, 0i) <| MR.GenD3D10_OptimizeEarlyTranslate(a & ~((iv_pow2 << n) - 1)) -> bfi(iv_pow2 + n, 0, 0, a) <| MR.GenD3D10_OptimizeEarlyTranslate(a & ~(((iv_pow2 << n) - 1) << o) -> bfi(iv_pow2 + n, o, 0, a) <| MR.GenD3D10_OptimizeEarlyTranslate(a & ~(((iv_pow2 << n) << ov) + (-1 << ov))) -> bfi(iv_pow2 + n, ov, 0, a) <| MR.GenD3D10_OptimizeEarlyTranslate((a >> o1) << o2) : if( o1 == o2 ) -> bfi(o, 0, 0, a) <| MR.GenD3D10_OptimizeEarlyTranslate(a | ((iv_pow2 << n) - 1)) -> bfi(iv_pow2 + n, 0, -1, a) <| MR.GenD3D10_OptimizeEarlyTranslate(a | (((iv_pow2 << n) - 1) << o)) -> bfi(iv_pow2 + n, o, -1, a) <| MR.GenD3D10_OptimizeEarlyTranslate(a | (((iv_pow2 << n) << ov) + (-1 << ov))) -> bfi(iv_pow2 + n, ov, -1, a) <| MR.GenD3D10_OptimizeEarlyTranslate(a | (b << n)) : if(known_bfi_bitwidth_impmask(a, b, n)) -> bfi(get_bfi_bitwidth_impmask(a, b, n), n, b, a) <| MR.GenD3D10_OptimizeEarlyTranslate(a & n) << m : if( known_bfi_bitmask(a,n,m) ) -> bfi(bfi_bitwidth(a,n,m), m, n, 0i) <| MR.GenD3D10_OptimizeEarlyTranslate(a & n) | i << m : if( known_bfi_bitmask_ignore(a,n,i,m) ) -> bfi(bfi_bitwidth_ignore(a,n,i,m), m, n | i, 0i) <| MR.GenD3D10_OptimizeEarlyTranslate(a & n) << m : if( known_bfi_bitmask(n,a,m) ) -> bfi(bfi_bitwidth(n,a,m), m, a, 0i) <| MR.GenD3D10_OptimizeEarlyTranslate(a << m) & n : if( known_bfi_bitmask_postshift(n,a,m) ) -> bfi(bfi_bitwidth_postshift(n,a,m), m, a, 0i) <| MR.GenD3D10_OptimizeEarlyTranslate(a & n) >> m : if( known_ubfe_bitmask(a,n,m) ) -> ubfe(ubfe_bitwidth(a,n,m), m, n) <| MR.GenD3D10_OptimizeEarlyTranslate(a & n) >> m : if( known_ubfe_bitmask(n,a,m) ) -> ubfe(bitwidth(n,a,m), m, a) <| MR.GenD3D10_OptimizeEarlyTranslate(int)(a & n) >> m : if( high_bit_clear(a & n) && known_ubfe_bitmask(a,n,m) ) -> ubfe(bitwidth(a,n,m), m, n) <| MR.GenD3D10_OptimizeEarlyTranslate(int)(a & n) >> m : if( high_bit_clear(a & n) && known_ubfe_bitmask(n,a,m) ) -> ubfe(ubfe_bitwidth(n,a,m), m, a) <| MR.GenD3D10_OptimizeEarlyTranslate(a >> m) & n : if( known_ubfe_bitmask_nomaskshift(a,n,m) ) -> ubfe(ubfe_bitwidth_nomaskshift(a,n,m), m, n) <| MR.GenD3D10_OptimizeEarlyTranslate(a >> m) & n : if( high_bit_clear(a & n) && known_ubfe_bitmask_nomaskshift(a,n,m) ) -> ubfe(ubfe_bitwidth_nomaskshift(a,n,m), m, n) <| MR.GenD3D10_OptimizeEarlyTranslatedcl_func_output(a) -> o->append_dataflow() <| SMR.DataflowAnalysisbind_load(chain, value) -> o->append_sources(chain) <| SMR.DataflowAnalysisloop_in(completed a) -> o->append_inloop() <| SMR.RangeDataAnalysis$IsStandardLoad(a, chain) -> append_addressed(o, chain) (range/flag prop) <| SMR.RangeDataAnalysis$IsResLoad(uav, a, addr, offs, mask) -> append_arg(sources(o, a)) <| SMR.RangeDataAnalysismovc(true,b,c) -> append_arg(b) <| SMR.RangeDataAnalysismovc(false,b,c) -> append_arg(b) <| SMR.RangeDataAnalysismovc(a,b,c) -> append_arg(b, c) <| SMR.RangeDataAnalysiscmp(a,b,c) -> append_arg(b, c) <| SMR.RangeDataAnalysisignore move(a) -> append_arg(a) <| SMR.RangeDataAnalysisignore double move(a) -> append_arg(a) <| SMR.RangeDataAnalysispred move(a) -> append_arg(a) <| SMR.RangeDataAnalysistunnelable move(a) -> append_arg(a) <| SMR.RangeDataAnalysisand(btrue,a) -> append_arg(a) <| SMR.RangeDataAnalysisand(false,a) -> append_arg(0,a) <| SMR.RangeDataAnalysisor(bfalse,a) -> append_arg(a) <| SMR.RangeDataAnalysisor(true,a) -> append_arg(true,a) <| SMR.RangeDataAnalysismul(1f,a) -> append_arg(a) <| SMR.RangeDataAnalysisadd(0f,a) -> append_arg(a) <| SMR.RangeDataAnalysismul(fbool,a) -> append_arg(0f,a) <| SMR.RangeDataAnalysismul(fbool,finite a) -> append_arg(0f,a) <| SMR.RangeDataAnalysislerp(fbool, a, b) -> append_arg(a,b) <| SMR.RangeDataAnalysislerp(fbool, finite a, finite b) -> append_arg(a,b) <| SMR.RangeDataAnalysislerp(fbool, a, 0) -> append_arg(a,0) <| SMR.RangeDataAnalysislerp(fbool, finite a, 0) -> append_arg(a,0) <| SMR.RangeDataAnalysisa + -a -> append_arg(0) <| SMR.RangeDataAnalysis(a + F) - a -> append_arg(F) <| SMR.RangeDataAnalysisa + (F - a) -> append_arg(F) <| SMR.RangeDataAnalysis(a + F1) - (a + F2) -> append_arg(F1-F2) <| SMR.RangeDataAnalysisfinite a + -a -> append_arg(0) <| SMR.RangeDataAnalysisi + -i -> append_arg(0) <| SMR.RangeDataAnalysis(i + I) - i -> append_arg(I) <| SMR.RangeDataAnalysisi + (I - i) -> append_arg(I) <| SMR.RangeDataAnalysis(i + I1) - (i + I2) -> append_arg(I1-I2) <| SMR.RangeDataAnalysisendif(a,b) -> append_arg(a,b) <| SMR.RangeDataAnalysis$IsMultiWriteOut(a, chain) -> append_sources(a) <| SMR.RangeDataAnalysiso = dfuse(ab) -> o->append_dfuse() <| SMR.DataFlagAnalysisloop_in(completed a) -> o->append_inloop() <| SMR.DataFlagAnalysisloop_endif(a) -> append_arg(a, pred_a) <| SMR.DataFlagAnalysisfunction_endif(a) -> append_arg(a, pred_a) <| SMR.DataFlagAnalysiscl = $IsBreak(a, ci) -> append_arg(a, ci) <| SMR.DataFlagAnalysiscl = $IsContinue(a, ci) -> append_arg(a, ci) <| SMR.DataFlagAnalysiscf = $IsReturn(a, ci) -> append_arg(a, ci) <| SMR.DataFlagAnalysiscl = $IsConsume(a, b, ci) -> append_arg(ci) <| SMR.DataFlagAnalysisendif(a,b) -> append_arg(a,b,p_a) <| SMR.DataFlagAnalysisloop_endif(a,b) -> append_arg(a,b,p_a) <| SMR.DataFlagAnalysisfunction_endif(a,b) -> append_arg(a,b,p_a) <| SMR.DataFlagAnalysischain_merge($IsSync() || chain) -> append_arg(sync) <| SMR.DataFlagAnalysis_ConstInterp$IsStandardLoad(a, chain) -> append_addressed(o, chain), append_arg(a, chain) <| SMR.DataFlagAnalysis_PlaceHolder$IsAtomicAllocConsume(a, res) -> append_arg(all_sources(o, a)) <| SMR.DataFlagAnalysis_PlaceHolder$IsTwoValueAtomic(chain, res, addr, op1, op2) -> append_arg(all_sources(o, chain), chain, addr, op1, op2) <| SMR.DataFlagAnalysis_PlaceHolder$IsBasicOrImmAtomic(a, res, addr, op) -> append_arg(all_sources(o, a), a, addr, op) <| SMR.DataFlagAnalysis_PlaceHolder$IsResLoad(uav, a, addr, offs, mask) -> append_arg(all_sources(o, a), uav, a, addr, offs, mask) <| SMR.DataFlagAnalysis_PlaceHolder$IsStandardStore(addr, val, chain) -> append_param(chain) <| SMR.DataFlagAnalysis_PlaceHolder$IsResStore(uav, a, addr, offs, mask, val) -> append_param(a) <| SMR.DataFlagAnalysis_PlaceHoldercl = endcase(ci, ch) -> append_arg(ci, ci_p, ch) <| SMR.DataFlagAnalysis_PlaceHoldercl = fcbody_end(ci, ch) -> append_arg(ci, ci_p, ch) <| SMR.DataFlagAnalysis_PlaceHolderdiscard_endif(a,b) -> append_arg(a,b,p_a) <| SMR.DataFlagAnalysis_PlaceHolder$IsLoop(a) -> append_sources() (loop predicate linkage) <| SMR.DataFlagAnalysis_PlaceHolder$IsMultiWriteOut(a, chain) -> append_sources(a) <| SMR.DataFlagAnalysis_PlaceHolder$IsSync() -> append_all_visible+inputs(UAV chain args) <| SMR.DataFlagAnalysis_PlaceHolder$IsStandardStore(addr, val, chain) -> append_param(chain) <| SMR.DataFlagAnalysis_NoPlaceHolderchain_merge($IsSync() || chain) -> append_arg(chain) <| SMR.DataFlagAnalysis_NoPlaceHolderchain_merge(chain_merge() || chain) -> append_arg(chain) <| SMR.DataFlagAnalysis_NoPlaceHolderarray_merge(chain_merge() || chain) -> append_arg(chain) <| SMR.DataFlagAnalysis_NoPlaceHoldercl = emitarg(a, b, ci) -> append_arg(ci) <| SMR.DataFlagAnalysis_NoPlaceHoldercl = emit(ci, stream) -> append_arg(ci) <| SMR.DataFlagAnalysis_NoPlaceHoldercl = casecond(ci, c) -> append_arg(ci) <| SMR.DataFlagAnalysis_NoPlaceHoldercl = endcase(ci, ch) -> append_arg(ci) <| SMR.DataFlagAnalysis_NoPlaceHoldercl = fcbody(ci, c) -> append_arg(ci, c) <| SMR.DataFlagAnalysis_NoPlaceHoldercl = fcbody_end(ci, ch) -> append_arg(ci, ci_p, ch) <| SMR.DataFlagAnalysis_NoPlaceHolderloop(a) -> append_sources() (loop predicate linkage) <| SMR.DataFlagAnalysis_NoPlaceHoldero = $IsStandardLoad(a, chain) -> append_addressed(o, chain) (all sources) <| SMR.DataFlagAnalysis_NoPlaceHolder$IsMultiWriteOut(a, chain) -> append_sources(a) <| SMR.DataFlagAnalysis_NoPlaceHolder$IsAtomicAllocConsume(a, res) -> append_arg(all_sources(o, a)) <| SMR.DataFlagAnalysis_NoPlaceHolder$IsTwoValueAtomic(chain, res, addr, op1, op2) -> append_arg(chain, addr, op1, op2) <| SMR.DataFlagAnalysis_NoPlaceHolder$IsBasicOrImmAtomic(a, res, addr, op) -> append_arg(all_sources(o, a), addr, op) <| SMR.DataFlagAnalysis_NoPlaceHolder$IsResLoad(uav, a, addr, offs, mask) -> append_arg(all_sources(o, a), addr, offs) <| SMR.DataFlagAnalysis_NoPlaceHolder$IsResStore(uav, a, addr, offs, mask, val) -> append_param(a) (chain) <| SMR.DataFlagAnalysis_NoPlaceHolderd(x)/dz -> dx/dz <| SR.GenDerivatives_Unaryd((double)x)/dz -> (double)dx/dz <| SR.GenDerivatives_Unaryd(-x)/dz -> -dx/dz <| SR.GenDerivatives_Unaryd((double)-x)/dz -> -(double)dx/dz <| SR.GenDerivatives_Unaryd(x+eps)/dz -> dx/dz <| SR.GenDerivatives_Unaryd(1/x)/dz -> -dx/dz/x^2 <| SR.GenDerivatives_Unaryd(2^x)/dz -> ln(2) * 2^x * dx/dz <| SR.GenDerivatives_Unaryd(log_2(x))/dz -> 1/(x * ln(2)) * dx/dz <| SR.GenDerivatives_Unaryd(x^-0.5)/dz -> -0.5*x^-1.5 * dx/dz <| SR.GenDerivatives_Unaryd(sin(x))/dz -> cos(x) * dx/dz <| SR.GenDerivatives_Unaryd(cos(x))/dz -> -sin(x) * dx/dz <| SR.GenDerivatives_Unaryd(asin(x))/dz -> 1/sqrt(1-x^2) * dx/dz <| SR.GenDerivatives_Unaryd(acos(x))/dz -> -1/sqrt(1-x^2) * dx/dz <| SR.GenDerivatives_Unaryd(atan(x))/dz -> 1/(1+x^2) * dx/dz <| SR.GenDerivatives_Unary$IsAnyDeriv(x)/dz -> $IsAnyDeriv(dx/dz) <| SR.GenDerivatives_Unarydsy(x)/dz -> dsy(dx/dz) <| SR.GenDerivatives_Unarysqrt(x)/dz -> 0.5 / sqrt(x) * (dx/dz) <| SR.GenDerivatives_Unarydtof(x)/dz -> dtof(dx/dz) <| SR.GenDerivatives_Unaryftod(x)/dz -> ftod(dx/dz) <| SR.GenDerivatives_Unaryd(min(x,y))/dz -> (x < y) ? dx/dz : ((y < x) ? dy/dz : min(dx/dz, dy/dz) <| SR.GenDerivatives_Binaryd(max(x,y))/dz -> (x > y) ? dx/dz : ((y > x) ? dy/dz : max(dx/dz, dy/dz) <| SR.GenDerivatives_Binaryd(dmin(x,y))/dz -> (x < y) ? dx/dz : ((y < x) ? dy/dz : dmin(dx/dz, dy/dz) <| SR.GenDerivatives_Binaryd(dmax(x,y))/dz -> (x > y) ? dx/dz : ((y > x) ? dy/dz : dmax(dx/dz, dy/dz) <| SR.GenDerivatives_Binaryd(x + y)/dz -> dx/dz + dy/dz <| SR.GenDerivatives_Binaryd((double)x + (double)y)/dz -> dx/dz + dy/dz <| SR.GenDerivatives_Binaryd(x * x)/dz -> 2*dx/dz * x <| SR.GenDerivatives_Binaryd((double)x * x)/dz -> 2*dx/dz * x <| SR.GenDerivatives_Binaryd(x * y)/dz -> dx/dz * y + x * dy/dz <| SR.GenDerivatives_Binaryd((double)x * y)/dz -> dx/dz * y + x * dy/dz <| SR.GenDerivatives_Binaryd(atan2(x,y))/dz -> 1 / (1 + (y/x)^2) * d(y/x)/dz <| SR.GenDerivatives_Binaryd(x / y)/dz -> dx/dz / y + x * -dy/dz / y^2 <| SR.GenDerivatives_Binaryd(a ? b : c)/dz -> a ? db/dz : dc/dz <| SR.GenDerivatives_Ternaryabs fp_flags <| SFPSabs fp_specials <| SFPSabs float_literal <| SFPSabs fp_range <| SFPSacos fp_flags <| SFPSacos fp_specials <| SFPSacos float_literal <| SFPSacos fp_range <| SFPSadd fp_flags <| SFPSadd fp_specials <| SFPSadd float_literal <| SFPSadd fp_range <| SFPSand fp_flags <| SFPSand int_flags <| SFPSand int_literal <| SFPSand bits_known <| SFPSasin fp_flags <| SFPSasin fp_specials <| SFPSasin float_literal <| SFPSasin fp_range <| SFPSatan fp_flags <| SFPSatan fp_specials <| SFPSatan float_literal <| SFPSatan fp_range <| SFPSatan2 fp_flags <| SFPSatan2 fp_specials <| SFPSatan2 float_literal <| SFPSatan2 fp_range <| SFPSbdeq fp_flags <| SFPSbdeq int_literal <| SFPSbdeq int_range <| SFPSbdge fp_flags <| SFPSbdge int_literal <| SFPSbdge int_range <| SFPSbdlt fp_flags <| SFPSbdlt int_literal <| SFPSbdlt int_range <| SFPSbdne fp_flags <| SFPSbdne int_literal <| SFPSbdne int_range <| SFPSbeq fp_flags <| SFPSbeq int_literal <| SFPSbeq int_range <| SFPSbfi fp_flags <| SFPSbfi int_literal <| SFPSbfi bits_known <| SFPSbge fp_flags <| SFPSbge int_literal <| SFPSbge int_range <| SFPSblt fp_flags <| SFPSblt int_literal <| SFPSblt int_range <| SFPSbne fp_flags <| SFPSbne int_literal <| SFPSbne int_range <| SFPSbieq fp_flags <| SFPSbieq int_literal <| SFPSbieq bits_known <| SFPSbieq int_range <| SFPSbige fp_flags <| SFPSbige int_literal <| SFPSbige bits_known <| SFPSbige int_range <| SFPSbilt fp_flags <| SFPSbilt int_literal <| SFPSbilt bits_known <| SFPSbilt int_range <| SFPSbine fp_flags <| SFPSbine int_literal <| SFPSbine bits_known <| SFPSbine int_range <| SFPSbufinfo fp_flags <| SFPSbuge fp_flags <| SFPSbuge int_literal <| SFPSbuge bits_known <| SFPSbuge int_range <| SFPSbult fp_flags <| SFPSbult int_literal <| SFPSbult bits_known <| SFPSbult int_range <| SFPSbreak fp_flags <| SFPSbtof fp_flags <| SFPSbtoi fp_flags <| SFPSbtoi int_literal <| SFPSbtoi bits_known <| SFPSbtoi int_range <| SFPScalclod1d fp_flags <| SFPScalclod1d_a fp_flags <| SFPScalclod1d_u fp_flags <| SFPScalclod1d_u_a fp_flags <| SFPScalclod2d fp_flags <| SFPScalclod2d_a fp_flags <| SFPScalclod2d_u fp_flags <| SFPScalclod2d_u_a fp_flags <| SFPScalclod3d fp_flags <| SFPScalclod3d_u fp_flags <| SFPScalclodcube fp_flags <| SFPScalclodcube_a fp_flags <| SFPScalclodcube_u fp_flags <| SFPScalclodcube_u_a fp_flags <| SFPScase fp_flags <| SFPSceil fp_flags <| SFPSceil fp_specials <| SFPSceil float_literal <| SFPSceil fp_range <| SFPSchain_end fp_flags <| SFPScmp fp_flags <| SFPScmp fp_specials <| SFPScmp float_literal <| SFPScmp fp_range <| SFPScontinue fp_flags <| SFPScos fp_flags <| SFPScos fp_specials <| SFPScos float_literal <| SFPScos fp_range <| SFPScountbits fp_flags <| SFPScountbits int_literal <| SFPScountbits bits_known <| SFPSdabs fp_flags <| SFPSdabs fp_specials <| SFPSdabs float_literal <| SFPSdabs fp_range <| SFPSdadd fp_flags <| SFPSdadd fp_specials <| SFPSdadd float_literal <| SFPSdadd fp_range <| SFPSdfuse fp_flags <| SFPSdfuse float_literal <| SFPSdfuse fp_specials <| SFPSdmad fp_flags <| SFPSdmad fp_specials <| SFPSdmad float_literal <| SFPSdmad fp_range <| SFPSdmax fp_flags <| SFPSdmax fp_specials <| SFPSdmax float_literal <| SFPSdmax fp_range <| SFPSdmin fp_flags <| SFPSdmin fp_specials <| SFPSdmin float_literal <| SFPSdmin fp_range <| SFPSdmov fp_flags <| SFPSdmov mov <| SFPSdmovc fp_flags <| SFPSdmovc fp_specials <| SFPSdmovc float_literal <| SFPSdmul fp_flags <| SFPSdmul fp_specials <| SFPSdmul float_literal <| SFPSdmul fp_range <| SFPSdneg fp_flags <| SFPSdneg fp_specials <| SFPSdneg float_literal <| SFPSdneg fp_range <| SFPSdsat fp_flags <| SFPSdsat float_literal <| SFPSdsat fp_range <| SFPSdsplit fp_flags <| SFPSdsplit int_literal <| SFPSdsplit fp_specials <| SFPSdtof fp_flags <| SFPSdtof float_literal <| SFPSdtof fp_range <| SFPSdtof fp_specials <| SFPSdiscardif fp_flags <| SFPSdiv fp_flags <| SFPSdiv fp_specials <| SFPSdiv float_literal <| SFPSdiv fp_range <| SFPSdsx fp_flags <| SFPSdsx fp_specials <| SFPSdsx float_literal <| SFPSdsx fp_range <| SFPSdsy fp_flags <| SFPSdsy fp_specials <| SFPSdsy float_literal <| SFPSdsy fp_range <| SFPSdsx_fine fp_flags <| SFPSdsx_fine fp_specials <| SFPSdsx_fine float_literal <| SFPSdsx_fine fp_range <| SFPSdsy_fine fp_flags <| SFPSdsy_fine fp_specials <| SFPSdsy_fine float_literal <| SFPSdsy_fine fp_range <| SFPSdsx_coarse fp_flags <| SFPSdsx_coarse fp_specials <| SFPSdsx_coarse float_literal <| SFPSdsx_coarse fp_range <| SFPSdsy_coarse fp_flags <| SFPSdsy_coarse fp_specials <| SFPSdsy_coarse float_literal <| SFPSdsy_coarse fp_range <| SFPSeval_centroid fp_flags <| SFPSeval_sample fp_flags <| SFPSeval_snapped fp_flags <| SFPSexp fp_flags <| SFPSexp fp_specials <| SFPSexp float_literal <| SFPSexp fp_range <| SFPSf16tof32 fp_flags <| SFPSf16tof32 float_literal <| SFPSf16tof32 bits_known <| SFPSf32tof16 fp_flags <| SFPSf32tof16 int_literal <| SFPSf32tof16 int_range <| SFPSfcall fp_flags <| SFPSfcbody fp_flags <| SFPSfirstbitlow fp_flags <| SFPSfirstbitlow int_literal <| SFPSfirstbitlow bits_known <| SFPSfirstbit_hi fp_flags <| SFPSfirstbit_hi int_literal <| SFPSfirstbit_hi bits_known <| SFPSfirstbit_shi fp_flags <| SFPSfirstbit_shi int_literal <| SFPSfirstbit_shi bits_known <| SFPSfloor fp_flags <| SFPSfloor fp_specials <| SFPSfloor float_literal <| SFPSfloor fp_range <| SFPSfrc fp_flags <| SFPSfrc fp_specials <| SFPSfrc float_literal <| SFPSfrc fp_range <| SFPSftob fp_flags <| SFPSftob int_literal <| SFPSftob int_range <| SFPSftod fp_flags <| SFPSftod float_literal <| SFPSftod fp_range <| SFPSftod fp_specials <| SFPSftoi fp_flags <| SFPSftoi int_literal <| SFPSftoi int_range <| SFPSftou fp_flags <| SFPSftou int_literal <| SFPSftou int_range <| SFPSfunctionif fp_flags <| SFPSgather2d fp_flags <| SFPSgather2d_a fp_flags <| SFPSgather2d_a_o fp_flags <| SFPSgather2d_o fp_flags <| SFPSgathercube fp_flags <| SFPSgathercube_a fp_flags <| SFPSgathercube_c fp_flags <| SFPSgathercube_c_a fp_flags <| SFPSge fp_flags <| SFPSge float_literal <| SFPSge fp_range <| SFPSiadd fp_flags <| SFPSiadd int_literal <| SFPSiadd bits_known <| SFPSiadd int_range <| SFPSibfe fp_flags <| SFPSibfe int_literal <| SFPSibfe bits_known <| SFPSidiv fp_flags <| SFPSidiv int_literal <| SFPSidiv bits_known <| SFPSidiv int_range <| SFPSimad fp_flags <| SFPSimad int_literal <| SFPSimad bits_known <| SFPSimad int_range <| SFPSimax fp_flags <| SFPSimax int_literal <| SFPSimax bits_known <| SFPSimax int_range <| SFPSimin fp_flags <| SFPSimin int_literal <| SFPSimin bits_known <| SFPSimin int_range <| SFPSimod fp_flags <| SFPSimod int_literal <| SFPSimod bits_known <| SFPSimod int_range <| SFPSimul fp_flags <| SFPSimul int_literal <| SFPSimul bits_known <| SFPSimul int_range <| SFPSineg fp_flags <| SFPSineg int_literal <| SFPSineg bits_known <| SFPSineg int_range <| SFPSishl fp_flags <| SFPSishl int_literal <| SFPSishl bits_known <| SFPSishr fp_flags <| SFPSishr int_literal <| SFPSishr bits_known <| SFPSitob fp_flags <| SFPSitob int_literal <| SFPSitob bits_known <| SFPSitob int_range <| SFPSitof fp_flags <| SFPSload fp_flags <| SFPSload_o fp_flags <| SFPStload fp_flags <| SFPSload2d_msaa fp_flags <| SFPSload2d_msaa_o fp_flags <| SFPSload2darray_msaa fp_flags <| SFPSload2darray_msaa_o fp_flags <| SFPSlog fp_flags <| SFPSlog fp_specials <| SFPSlog float_literal <| SFPSlog fp_range <| SFPSloopif fp_flags <| SFPSlt fp_flags <| SFPSlt float_literal <| SFPSlt fp_range <| SFPSmad fp_flags <| SFPSmad fp_specials <| SFPSmad float_literal <| SFPSmad fp_range <| SFPSmax fp_flags <| SFPSmax fp_specials <| SFPSmax float_literal <| SFPSmax fp_range <| SFPSmin fp_flags <| SFPSmin fp_specials <| SFPSmin float_literal <| SFPSmin fp_range <| SFPSmov fp_flags <| SFPSmov mov <| SFPSmovc fp_flags <| SFPSmovc fp_specials <| SFPSmovc float_literal <| SFPSmul fp_flags <| SFPSmul fp_specials <| SFPSmul float_literal <| SFPSmul fp_range <| SFPSneg fp_flags <| SFPSneg fp_specials <| SFPSneg float_literal <| SFPSneg fp_range <| SFPSnot fp_flags <| SFPSnot int_literal <| SFPSnot bits_known <| SFPSor fp_flags <| SFPSor int_flags <| SFPSor int_literal <| SFPSor bits_known <| SFPSplacement_mov fp_flags <| SFPSplacement_mov mov <| SFPSrcp fp_flags <| SFPSrcp fp_specials <| SFPSrcp float_literal <| SFPSrcp fp_range <| SFPSrcp_approx fp_flags <| SFPSrcp_approx fp_specials <| SFPSrcp_approx float_literal <| SFPSrcp_approx fp_range <| SFPSresinfo fp_flags <| SFPSresinfo_uint fp_flags <| SFPSreturn fp_flags <| SFPSreversebits fp_flags <| SFPSreversebits int_literal <| SFPSreversebits bits_known <| SFPSround fp_flags <| SFPSround fp_specials <| SFPSround float_literal <| SFPSround fp_range <| SFPSrsq fp_flags <| SFPSrsq fp_specials <| SFPSrsq float_literal <| SFPSrsq fp_range <| SFPSsample1d fp_flags <| SFPSsample1d_a fp_flags <| SFPSsample1d_o fp_flags <| SFPSsample1d_a_o fp_flags <| SFPSsample1d_bias fp_flags <| SFPSsample1d_bias_a fp_flags <| SFPSsample1d_bias_o fp_flags <| SFPSsample1d_bias_a_o fp_flags <| SFPSsample1d_bias_l fp_flags <| SFPSsample1d_c fp_flags <| SFPSsample1d_c_a fp_flags <| SFPSsample1d_c_o fp_flags <| SFPSsample1d_c_a_o fp_flags <| SFPSsample1d_c_lz fp_flags <| SFPSsample1d_c_lz_a fp_flags <| SFPSsample1d_c_lz_o fp_flags <| SFPSsample1d_c_lz_a_o fp_flags <| SFPSsample1d_dd fp_flags <| SFPSsample1d_dd_a fp_flags <| SFPSsample1d_dd_o fp_flags <| SFPSsample1d_dd_a_o fp_flags <| SFPSsample1d_lod fp_flags <| SFPSsample1d_lod_a fp_flags <| SFPSsample1d_lod_o fp_flags <| SFPSsample1d_lod_a_o fp_flags <| SFPSsample1d_lod_l fp_flags <| SFPSsample2d fp_flags <| SFPSsample2d_a fp_flags <| SFPSsample2d_o fp_flags <| SFPSsample2d_a_o fp_flags <| SFPSsample2d_dd fp_flags <| SFPSsample2d_dd_a fp_flags <| SFPSsample2d_dd_o fp_flags <| SFPSsample2d_dd_a_o fp_flags <| SFPSsample2d_lod fp_flags <| SFPSsample2d_lod_a fp_flags <| SFPSsample2d_lod_o fp_flags <| SFPSsample2d_lod_a_o fp_flags <| SFPSsample2d_c fp_flags <| SFPSsample2d_c_a fp_flags <| SFPSsample2d_c_o fp_flags <| SFPSsample2d_c_a_o fp_flags <| SFPSsample2d_c_lz fp_flags <| SFPSsample2d_c_lz_a fp_flags <| SFPSsample2d_c_lz_o fp_flags <| SFPSsample2d_c_lz_a_o fp_flags <| SFPSsample2d_bias fp_flags <| SFPSsample2d_bias_a fp_flags <| SFPSsample2d_bias_o fp_flags <| SFPSsample2d_bias_a_o fp_flags <| SFPSsample2d_lod_l fp_flags <| SFPSsample2d_bias_l fp_flags <| SFPSsample3d fp_flags <| SFPSsample3d_o fp_flags <| SFPSsample3d_dd fp_flags <| SFPSsample3d_dd_o fp_flags <| SFPSsample3d_lod fp_flags <| SFPSsample3d_lod_o fp_flags <| SFPSsample3d_bias fp_flags <| SFPSsample3d_bias_o fp_flags <| SFPSsample3d_lod_l fp_flags <| SFPSsample3d_bias_l fp_flags <| SFPSsamplecube fp_flags <| SFPSsamplecube_dd fp_flags <| SFPSsamplecube_lod fp_flags <| SFPSsamplecube_c fp_flags <| SFPSsamplecube_c_a fp_flags <| SFPSsamplecube_c_lz fp_flags <| SFPSsamplecube_c_lz_a fp_flags <| SFPSsamplecube_bias fp_flags <| SFPSsamplecube_a fp_flags <| SFPSsamplecube_dd_a fp_flags <| SFPSsamplecube_lod_a fp_flags <| SFPSsamplecube_bias_a fp_flags <| SFPSsamplecube_lod_l fp_flags <| SFPSsamplecube_bias_l fp_flags <| SFPSsampleinfo fp_flags <| SFPSsampleinfo_uint fp_flags <| SFPSsampleinfo_rt fp_flags <| SFPSsampleinfo_uint_rt fp_flags <| SFPSsamplepos fp_flags <| SFPSsamplepos_rt fp_flags <| SFPSsat fp_flags <| SFPSsat float_literal <| SFPSsat fp_range <| SFPSsin fp_flags <| SFPSsin fp_specials <| SFPSsin float_literal <| SFPSsin fp_range <| SFPSsincos fp_flags <| SFPSsincos fp_specials <| SFPSsincos float_literal <| SFPSsincos fp_range <| SFPSsqrt fp_flags <| SFPSsqrt fp_specials <| SFPSsqrt float_literal <| SFPSsqrt fp_range <| SFPSswitch fp_flags <| SFPStex1d fp_flags <| SFPStex1d_bias fp_flags <| SFPStex1d_dd fp_flags <| SFPStex1d_lod fp_flags <| SFPStex1d_proj fp_flags <| SFPStex2d fp_flags <| SFPStex2d_bias fp_flags <| SFPStex2d_dd fp_flags <| SFPStex2d_lod fp_flags <| SFPStex2d_proj fp_flags <| SFPStex3d fp_flags <| SFPStex3d_bias fp_flags <| SFPStex3d_dd fp_flags <| SFPStex3d_lod fp_flags <| SFPStex3d_proj fp_flags <| SFPStexcube fp_flags <| SFPStexcube_bias fp_flags <| SFPStexcube_dd fp_flags <| SFPStexcube_lod fp_flags <| SFPStexcube_proj fp_flags <| SFPStrunc fp_flags <| SFPStrunc fp_specials <| SFPStrunc float_literal <| SFPStrunc fp_range <| SFPSuaddc fp_flags <| SFPSuaddc int_literal <| SFPSuaddc bits_known <| SFPSuaddc int_range <| SFPSubfe fp_flags <| SFPSubfe int_literal <| SFPSubfe bits_known <| SFPSusubb fp_flags <| SFPSusubb int_literal <| SFPSusubb bits_known <| SFPSusubb int_range <| SFPSudiv fp_flags <| SFPSudiv int_literal <| SFPSudiv bits_known <| SFPSudiv int_range <| SFPSumax fp_flags <| SFPSumax int_literal <| SFPSumax bits_known <| SFPSumax int_range <| SFPSumin fp_flags <| SFPSumin int_literal <| SFPSumin bits_known <| SFPSumin int_range <| SFPSumod fp_flags <| SFPSumod int_literal <| SFPSumod bits_known <| SFPSumod int_range <| SFPSumul fp_flags <| SFPSumul int_literal <| SFPSumul bits_known <| SFPSumul int_range <| SFPSushr fp_flags <| SFPSushr int_literal <| SFPSushr bits_known <| SFPSutof fp_flags <| SFPSxor fp_flags <| SFPSxor int_flags <| SFPSxor int_literal <| SFPSxor bits_known <| SFPSbreak_consume fp_flags <| SFPScontinue_consume fp_flags <| SFPSloopif_consume fp_flags <| SFPSoutput_consume fp_flags <| SFPSreturn_consume fp_flags <| SFPSsync_g fp_flags <| SFPSsync_ug fp_flags <| SFPSsync_up fp_flags <| SFPSsync_g_ug fp_flags <| SFPSsync_g_up fp_flags <| SFPSsync_g_t fp_flags <| SFPSsync_ug_t fp_flags <| SFPSsync_up_t fp_flags <| SFPSsync_g_ug_t fp_flags <| SFPSsync_g_up_t fp_flags <| SFPSarraystore fp_flags <| SFPSarrayload fp_flags <| SFPSbind_load fp_flags <| SFPSatomic_and fp_flags <| SFPSatomic_or fp_flags <| SFPSatomic_xor fp_flags <| SFPSatomic_iadd fp_flags <| SFPSatomic_imax fp_flags <| SFPSatomic_imin fp_flags <| SFPSatomic_umax fp_flags <| SFPSatomic_umin fp_flags <| SFPSatomic_cmp_store fp_flags <| SFPSimm_atomic_and fp_flags <| SFPSimm_atomic_or fp_flags <| SFPSimm_atomic_xor fp_flags <| SFPSimm_atomic_iadd fp_flags <| SFPSimm_atomic_imax fp_flags <| SFPSimm_atomic_imin fp_flags <| SFPSimm_atomic_umax fp_flags <| SFPSimm_atomic_umin fp_flags <| SFPSimm_atomic_exch fp_flags <| SFPSimm_atomic_cmp_exch fp_flags <| SFPSimm_atomic_alloc fp_flags <| SFPSimm_atomic_consume fp_flags <| SFPSNeeds to be replaced with a real ruleIEEE-safe mode clamps float literals to 32-bit values, %g is losing precision (this warning will only be shown once per compile)32-bit floating-point operations flush denorm float literals to zero, %g is losing precision (this warning will only be shown once per compile)(unknown)output%s semantic '%s'p=DetectRaceConditionsRemoveDeadCodeMarkSideEffectsVectorizeLeftRequiredTranslatePropagateFlagsSimplifyInstructionsSimplifyPredicatesCompactOutputsHull Shader pass-through analysisFactorMadsDelayOutputsReduceLiteralsSimplifyInstructionsLegacyHull Shader Patch Constant SeparationSimplifyInstructionsComplexSimplifyRangeExpressionsGroupStoresUnaliasArrayLoadsSimplifyFlowStoresCompactArraysCombineInstructionsSquishInstructionsRemoveDuplicateInstructionsMergeInstructionsSimplifyLoadsSimplifyAddressesSimplifyAddressesIPAPropagatePredicatesOptimizeEarlyTranslateBackEndOptimizeReorderBinaryReorderBinaryIShuffleComputeinternal warning: optimization did not convergeSplitConvertIgnoresHull Shader codegenmultiple variables found with the same user-specified locationgradient-based operations must be moved out of flow control to prevent divergence. Performance may improve by using a non-gradient operationcannot have gradient operations inside loops with divergent flow controlinternal error: argument pulled into unrelated predicatecannot have divergent gradient operations inside flow controlSplitRegistersTranslateVectorizeLiteralsReorderInstructionsSeparatePhasesPropagateMovsConstrainCompactRegistersCombineInstsVectorizedReading from texture buffers is unsupported on %stvShader uses texture addressing operations in a dependency chain that is too complex for the target shader model (%s) to handle.internal error: invalid registerpreshadervariable '%s' used without having been completely initialized <| A%u (B%u), I%u (B%u)race condition may make sync dependent on this potentially varying variable: %sthread sync operation must be in non-varying flow control, due to a potential race condition this sync is illegal, consider adding a sync after the value used to control the flow at this location is calculatedinternal warning: values did not convergeinternal error: component out of rangefloating point division by zeroimaginary square rootindefinite logarithmindefinite arcsineindefinite arccosineLiteral float out of integer range for conversion: %fLiteral float out of unsigned range for conversion: %fsum of %g and %g cannot be represented accurately in double precisionInteger divide by zeroUnsigned integer divide by zeroFloating-point Value out of integer range for conversion: %fFloating-point Value out of unsigned range for conversion: %findefinite derivative calculationPossible integer divide by zeroDerivative being used before it was defined. If you used the assignment syntax, consider moving it earlier in the program.Derivative is not defined in this branch of flow-control. If you used the assignment syntax, consider moving the assignment before any flow control statements.Redefinition of derivative, derivatives may only be assigned once.Derivatives of known values are unimplemented.Unable to calculate derivative of this operation. Consider using the assignment syntax to calculate it yourself (e.g.: x`(y) = z)internal error: instruction list too longinternal error: instruction list and count mismatchinternal error: argument used without having been initialized <| A%u (B%u), I%u (B%u)internal error: output argument was never initialized <| (A%u (B%u))internal error: cannot write to argument pool <| (A%u (B%u), I%u (B%u))internal error: cannot read from argument pool <| (A%u (B%u))internal error: 64-bit arg component %u not aligned <| A%u (B%u)internal error: reading from value known not to be read <| (A%u (B%u))internal error: argument was never used <| (A%u (B%u), I%u (B%u))internal error: argument was never used <| (A%u (B%u))Use of potentially uninitialized variable (%s)Internal error: unpredicated endif inputInternal error: invalid read of more specific predicateinternal error: unpredicated incompleteinternal error: unpredicated loop_inInternal error: unread predicateoverlapping register semantics not yet implemented 'c%u'{j{|SV_TARGETSV_DEPTHSV_DEPTHGREATEREQUALSV_DEPTHLESSEQUALSV_COVERAGE P0Pp@`P0PpPPpp	PPPp``P@@$InvalidNo include handler specified, can't perform a #include. Use D3DX APIs or provide your own include handler.failed to open source file: '%s'C#unexpected tokens following preprocessor directiveunexpected end of file__FILE____LINE__DIRECT3DD3DXD3D10_COMPILERHLSL_VERSIOND3DX_VERSIONdefineeliferrorifdefifndefincludepragmaundefdefinedinvalid or unsupported integer constant expressiondivision by zero in preprocessor expressioninvalid preprocessor command '%s'duplicate macro parameter '%s'include interface required to support #include from resource or memorytoo many nested #includeserror: %sunexpected #elifunexpected #elif following #elseunexpected #elseunexpected #else following #elseunexpected #endifpack_matrixwarningruledisablemessage'%s' : unknown pragma ignoredoncedisable'%s' : macro redefinitionfunctional defines in preprocessor expressions not yet implementedunexpected end of file in macro expansionArgnot enough actual parameters for macro '%s'#@##1.#SNAN1.#QNAN1.#INF1.#IND(%u,%u): %s X%u: Error creating error stringwarning treated as errorUnable to create warning stringinteger '%u'integer '%dl'integer '%uul'integer '%I64'integer '%u64u64'float '%g'float '%gh'float '%gf'float '%gl'syntax error : unexpected %scomment continues past end of filehex value truncated to 64 bitsoctal value truncated to 64 bitsdecimal value truncated to 64 bitsstring continues past end of filestring continues past end of linecharacter continues past end of filefinalTriWEdgeTessFactorfinalTriVEdgeTessFactorfinalTriUEdgeTessFactorD3D11 Assembler Error: Invalid Bytecode: %sD3D11 Internal Compiler Error: Invalid Bytecode: %sValidation Error: %sBytecode appears corrupt - integrity check failed.Failed to extract driver shader code.Failed to extract input signature.Failed to extract output signature.ShaderFeatureInfo blob must not specify 4x raw and structured buffers for Compute Shaders, or for any shader 5_0+.Failed to extract patch constant signature.Unrecognized shader type.Failed to parse shader using reference shader parser: 0x%xInvalid interface metadata: too many instances.Invalid interface metadata: too many types.Invalid interface metadata: too many interface slots.Invalid interface metadata: no types defined.Invalid interface metadata: instance buffer overrun.Invalid interface metadata: type buffer overrun.Invalid interface metadata: interface buffer overrun.Invalid interface metadata: interface %u unimplemented.Invalid interface metadata: duplicated type in interface %d's type list.Invalid interface metadata: interface count mismatch.Invalid interface metadata: type %d violates type stride limits.Invalid interface metadata: type name buffer overrun.Invalid interface metadata: unterminated type name.Invalid interface metadata: instance type buffer overrun.Invalid interface metadata: variable %d violates limits on member offsets.Invalid interface metadata: instance name buffer overrun.Invalid interface metadata: unterminated instance name.Can't continue validation - aborting.label (%d) already defined. Opcode #%d (count 1-based). function body (%d) defined without being declared. Opcode #%d (count 1-based). function body (%d) referenced without being defined. Opcode #%d (count 1-based). function body (%d) already declared. Opcode #%d (count 1-based). Declaration statements must appear before other instructions.	(		(	(		(		(		%(	#(
&'


&'
(#(((((%(&'	 !"$(
 !"$(Incorrect number of operands for opcode #%d (count is 1-based).  Expecting %d, encountered %d.Saturate modifier not permitted for opcode #%d (counts are 1-based). Precise mask not permitted for opcode #%d (counts are 1-based). Resource dimension and return type extended opcodes not expected on opcode #%d (counts are 1-based). Invalid operand type for operand #%d of opcode #%d (counts are 1-based). Expected component count of 0 for operand #%d of opcode #%d (counts are 1-based). Expected component count of 1 (or 4 component with select-1 mode) for operand #%d of opcode #%d (counts are 1-based). Expected component count of 4 (or 1 component immediate32, or in certain cases NULL or scalar operand allowed) for operand #%d of opcode #%d (counts are 1-based). Expected nonzero component mask (or in certain cases also NULL or single component output operand allowed) for operand #%d of opcode #%d (counts are 1-based). Expected single component mask (or in certain cases also NULL or single component output operand allowed) for operand #%d of opcode #%d (counts are 1-based). Expected contiguous component mask starting at x (.x, .xy, .xyz, or .xyzw) for operand #%d of opcode #%d (counts are 1-based). Expected a component mask which picks any one or 2 components for operand #%d of opcode #%d (counts are 1-based). Expected double-compatible component mask (xy, zw, or xyzw) for operand #%d of opcode #%d (counts are 1-based). Expected double-compatible swizzle for operand #%d of opcode #%d (counts are 1-based). Negate modifier not allowed for operand #%d of opcode #%d (counts are 1-based). Abs modifier not allowed for operand #%d of opcode #%d (counts are 1-based). .rrrr swizzle expected for operand #%d of opcode #%d (counts are 1-based). Only immediate32 indexing permitted for operand #%d of opcode #%d (counts are 1-based). Aborting.Indexing of t# resources with current instruction requires opcode to specify resource dimension and return type. Operand #%d of opcode #%d (counts are 1-based). Aborting.4 component with no swizzle expected for operand #%d of opcode #%d (counts are 1-based). Unexpected indexing dimension for operand #%d of opcode #%d (counts are 1-based). Aborting.Invalid indexing mode for first dimension.  Opcode #%d, operand #%d (counts are 1-based). Invalid index dimension %d for relative address temp register within dimension 1 of operand.  Opcode #%d, operand #%d (counts are 1-based). Index Dimension %d's relative address temp is out of range (%d specified, max allowed is %d) for operand #%d of opcode #%d (counts are 1-based). Aborting.Invalid index dimension for relative address indexable temp register within dimension %d of operand.  Opcode #%d, operand #%d (counts are 1-based). Index Dimension %d's relative address indexable temp is out of range (%d specified, max allowed is %d) for operand #%d of opcode #%d (counts are 1-based). Aborting.Index Dimension %d's relative address indexable temp's dimension %d index is out of range (%d specified, max allowed is %d) for operand #%d of opcode #%d (counts are 1-based). Aborting.Invalid relative indexing register type for dimension %d.  Operand #%d of opcode #%d (counts are 1-based). Aborting.Index Dimension %d out of range (%d specified, max allowed is %d) for operand #%d of opcode #%d (counts are 1-based). Aborting.Invalid representation for index dimension %d.  Opcode #%d, operand #%d (counts are 1-based). function body (%d) was never referenced.function body (%d) was never defined.function table (%d) was declared, but never referenced.Interface metadata instance %d refers to undeclared constant buffer %d.Interface metadata instance %d refers to undeclared constant buffer offset [%d,%d].Interface metadata instance %d refers to undeclared texture %d.Interface metadata instance %d refers to undeclared sampler %d.Interface metadata expects interface %d to be declared, but it was not.Interface metadata expects interface %d to be of size %d, but it was declared as size %d.interface pointer (%d) was declared, but never referenced.GS input primitive not declared. GS has no input primitive, so no input regisers may be declared.  Input v[][%d] was declared.All GS input v[][] registers must have vertex count (first dimension) declared with size equal to the number of vertices in the declared input primitive (%d vertices in this case). Input %d has %d vertices declared. GS output topology not declared for stream m%d. GS output topology not declared. Interpolation mode for PS input position must be linear_noperspective_centroid or linear_noperspective_sample when outputting oDepthGE or oDepthLE and not running at sample frequency (which is forced by inputting SV_SampleIndex or declaring an input linear_sample or linear_noperspective_sample). Compute Shader must declare a thread group size (X,Y,Z).Thread local temp register storage in Compute Shader (per thread) %d. The shader declares too much temp storage (%d registers). For Compute Shader versions < 5_0, the element count for all Structured Thread Group Shared Memory declarations 
must be equal to the number of threads in the group (%d in this case).  %d elements were specified for g%d. For Compute Shader versions < 5_0, with %d threads in a group, at most %d bytes per thread of Thread Group Shared Memory 
can be declared (the amount is a function of how many threads there are).  This shader exceeds the limit at %d bytes per thread. 
Domain Shader must declare an input control point count.Domain Shader must declare a tessellator domain.Domain Shader input vDomain must be declared with at most a .xyz mask when the domain is TRI.Domain Shader input vDomain must be declared with at most a .xy mask when the domain is QUAD.Domain Shader input vDomain must be declared with at most a .xy mask when the domain is ISOLINE.All DS input control point vcp[][] registers must have control point count (first dimension) declared with size equal to the number of input control points declared in the hs decls phase (%d control points in this case). Input %d has %d control points declared. Total number of scalars across all DS input control points must not exceed %d. Current input control point declaration specifies %d scalars of output per control point with %d output control points, resulting in %d total scalars of input control point data. []Input index range defined from %d to %d includes input register %s[%d] that was not declared. Registers in an input index range cannot have system names associated with them (TessFactors are an exception).  Input register %s[%d] has a name and is in an index range from %d to %d. Masks (and if pixel shader, also interpolation mode) on all input registers in an index range must be identical. Input register %s[%d] does not match with others in the index range from %d to %d. Named register components cannot appear to the left (xyzw order) of components that are not named in a given register. TessFactors are an exception. Affected register is input %d. Named register components cannot appear to the left (xyzw order) of components that are not named in a given register. TessFactors are an exception. Affected register is output %d in stream m%d. Named register components cannot appear to the left (xyzw order) of components that are not named in a given register. TessFactors are an exception. Affected register is output %d. Mismatch between shader declaration of double precision floats and accompanying Shader Feature Info blob (or lack thereof). Both the shader must declare double precision float use and a Shader Feature Info blob must specify the same thing as well, or neither should request it. Mismatch between shader declaration of raw and structured buffers for shader 4_x and accompanying Shader Feature Info blob (or lack thereof). Both the shader must declare raw and structured buffer use and a Shader Feature Info blob must specify the same thing as well, or neither should request it. Raw or Structured buffers can't be declared in shader model 4_* VS/GS/PS without enabling them via a global flags declaration.. CB[%d] already declared, repeated declaration on opcode #%d (count is 1-based). Immediate constant buffer already declared, repeated declaration on opcode #%d (count is 1-based). Immediate constant buffer size must be a multiple (not incl. 0) of 32bit*4-tuples in size, but no larger than %d 32bit*4-tuples (%d bytes declared).  Opcode #%d (count is 1-based). Temp decl already encountered.  Repeated declaration on opcode #%d (count is 1-based). Too many temp registers declared (%d).  Max allowed is %d.  Opcode #%d (count is 1-based). Sum of temp registers and indexable temp registers exceeds limit of %d..  Opcode #%d (count is 1-based). Indexable temp register index, [%d], too high.  Opcode #%d (count is 1-based). Aborting.Indexable temp x%d already declared.  Opcode #%d (count is 1-based). Sum of temp registers and indexable temp registers exceeds limit of %d..  Opcode #%d (count is 1-based). Aborting. Invalid component mask in indexable temp decl: 0x%x.  Opcode #%d (count is 1-based). Aborting. Resource t%d already declared.  Opcode #%d (count is 1-based). Expected sample count of 0 but encountered %d for resource t%d.  Opcode #%d (count is 1-based). Texture2DMS resources are only available for input to Pixel Shaders. Opcode #%d (count is 1-based). Expected sample count > 0 but encountered %d for resource t%d.  Opcode #%d (count is 1-based). Invalid resource dimension on resource t%d.  Opcode #%d (count is 1-based). Invalid resource return type on component %d of resource t%d.  Opcode #%d (count is 1-based). Sampler s%d already declared.  Opcode #%d (count is 1-based). Invalid sampler mode on sampler s%d.  Opcode #%d (count is 1-based). The first stream declaration cannot appear after any output or output topology declarations.  Opcode #%d (count is 1-based). Invalid stream index s%d.  Index must be between 0 and %d Opcode #%d (count is 1-based). Stream s%d already declared.  Opcode #%d (count is 1-based). Input index range declaration out of range.  Opcode #%d (count is 1-based). Overlapping input index range decl encountered.  Opcode #%d (count is 1-based). Output index range declaration out of range.  Opcode #%d (count is 1-based). Overlapping output index range decl encountered.  Opcode #%d (count is 1-based). GS output topology in stream m%d already declared.  Opcode #%d (count is 1-based). GS output topology already declared.  Opcode #%d (count is 1-based). GS output primitive topology unrecognized.  Opcode #%d (count is 1-based). GS output vertex count declaration can't be more than %d vertices (%d specified).  Opcode #%d (count is 1-based). GS instance count already declared.  Opcode #%d (count is 1-based). GS instance count declaration cannot be greater than %d (%d specified).  Opcode #%d (count is 1-based). GS instance count must be at least 1 (%d specified).  Opcode #%d (count is 1-based). GS input primitive already declared.  Opcode #%d (count is 1-based). GS input primitive can be a patch only if the GS version is gs_5_0 and greater.  Opcode #%d (count is 1-based). GS input primitive unrecognized.  Opcode #%d (count is 1-based). vCycleCounter is only supported on 5_0+ shaders.  Opcode #%d (count is 1-based). Cycle Counter already declared.  Opcode #%d (count is 1-based). Cycle Counter declaration must have mask of .x or .xy.  Opcode #%d (count is 1-based). Compute Shader input Thread ID already declared.  Opcode #%d (count is 1-based). Compute Shader input Thread ID declaration must have a non-empty mask and allows only components x, y, and z in mask.  Opcode #%d (count is 1-based). Compute Shader input Thread Group ID already declared.  Opcode #%d (count is 1-based). Compute Shader input Thread Group ID declaration must have a non-empty mask and allows only components x, y, and z in mask.  Opcode #%d (count is 1-based). Compute Shader input Thread ID In Group already declared.  Opcode #%d (count is 1-based). Compute Shader input Thread ID In Group declaration must have a non-empty mask and allows only components x, y, and z in mask.  Opcode #%d (count is 1-based). Compute Shader input Thread ID In Group Flattened already declared.  Opcode #%d (count is 1-based). Compute Shader input Thread ID In Group Flattened declaration must have an empty writemask.  Opcode #%d (count is 1-based). Input primitive ID already declared in this HS phase.  Opcode #%d (count is 1-based). Hull Shader output control point ID already declared.  Opcode #%d (count is 1-based). Hull Shader fork phase instance ID already declared.  Opcode #%d (count is 1-based). Hull Shader join phase instance ID already declared.  Opcode #%d (count is 1-based). When there is no Control Point phase in the HS, the control points are pass-through to the DS, but the Fork/Join phases in the HS cannot use 'output control points' (vocp[][] registers).  Instead just use vcp[][] input control points (which are the same anyway in the passthrough case). Opcode #%d (count is 1-based).Input primitive ID already declared.  Opcode #%d (count is 1-based). Input domain point already declared.  Opcode #%d (count is 1-based). Input domain point declaration can't have an empty mask.  Opcode #%d (count is 1-based). GS input primID already declared.  Opcode #%d (count is 1-based). GS instance ID already declared.  Opcode #%d (count is 1-based). PS input vCoverage already declared.  Opcode #%d (count is 1-based). Components of input declaration for register %d overlap with previous declaration for same register.  Opcode #%d (count is 1-based). Invalid name or shader for SGV dcl.  Opcode #%d (count is 1-based). SGV must have scalar mask in declaration.  Opcode #%d (count is 1-based). vertexID already declared for input.  Opcode #%d (count is 1-based). instanceID already declared for input.  Opcode #%d (count is 1-based). Invalid name or shader for SIV dcl.  Opcode #%d (count is 1-based). TessFactors must each be declared with a single component.  Opcode #%d (count is 1-based). finalQuad*TessFactor requires QUAD tessellator domain.  Opcode #%d (count is 1-based). finalTri*TessFactor requires TRI tessellator domain.  Opcode #%d (count is 1-based). finalLine*TessFactor requires ISOLINE tessellator domain.  Opcode #%d (count is 1-based). finalQuadUeq0EdgeTessFactor already declared for input.  Opcode #%d (count is 1-based). finalQuadVeq0EdgeTessFactor already declared for input.  Opcode #%d (count is 1-based). finalQuadUeq1EdgeTessFactor already declared for input.  Opcode #%d (count is 1-based). finalQuadVeq1EdgeTessFactor already declared for input.  Opcode #%d (count is 1-based). finalQuadUInsideTessFactor already declared for input.  Opcode #%d (count is 1-based). finalQuadVInsideTessFactor already declared for input.  Opcode #%d (count is 1-based). finalTriUeq0EdgeTessFactor already declared for input.  Opcode #%d (count is 1-based). finalTriVeq0EdgeTessFactor already declared for input.  Opcode #%d (count is 1-based). finalTriWeq0EdgeTessFactor already declared for input.  Opcode #%d (count is 1-based). finalTriInsideTessFactor already declared for input.  Opcode #%d (count is 1-based). finalLineDetailTessFactor already declared for input.  Opcode #%d (count is 1-based). finalLineDensityTessFactor already declared for input.  Opcode #%d (count is 1-based). position already declared for input.  Opcode #%d (count is 1-based). Too many unique registers contain clip/cull distance values.  At most %d unique registers can have clip/cull distance in components.  Opcode #%d (count is 1-based). Too many total clip/cull distance values.  At most %d allowed (clip+cull total).  Opcode #%d (count is 1-based). Components of input declaration for register v%d overlap with previous declaration for same register.  Opcode #%d (count is 1-based). Invalid interpolation mode for register v%d.  Opcode #%d (count is 1-based). Interpolation mode cannot vary for different components of a single input register (v%d).  Opcode #%d (count is 1-based). primitiveID already declared for input.  Opcode #%d (count is 1-based). isFrontFace already declared for input.  Opcode #%d (count is 1-based). sampleIndex already declared for input.  Opcode #%d (count is 1-based). Interpolation mode for PS SGV must be constant (register v%d).  Opcode #%d (count is 1-based). Interpolation mode for PS input position must be linear_noperspective or linear_noperspective_centroid (shader model 4.1+ allows linear_noperspective_sample as well). Interpolation mode for PS clip or cull distance must be linear or linear centroid, or in 4.1, linear_sample  (register v%d).  Opcode #%d (count is 1-based). renderTargetArrayIndex or viewportArrayIndex must have scalar mask in declaration.  Opcode #%d (count is 1-based). renderTargetArrayIndex already declared for input.  Opcode #%d (count is 1-based). viewportArrayIndex already declared for input.  Opcode #%d (count is 1-based). Interpolation mode for PS renderTargetArrayIndex or viewportArrayIndex must be constant (register v%d).  Opcode #%d (count is 1-based). PS output depth already declared.  Opcode #%d (count is 1-based). PS output depth already declared.  The previous declaration was of a different type.  Opcode #%d (count is 1-based). PS output coverage mask already declared.  Opcode #%d (count is 1-based). PS ouputs must be declared in slots less than UAVs.  Output declared in slot %d while UAV declared in slot %d.  Opcode #%d (count is 1-based). Components of output declaration for register o%d overlap with previous declaration for same register.  Opcode #%d (count is 1-based). Components of output declaration for register %d overlap with previous declaration for same register.  Opcode #%d (count is 1-based). primitiveID already declared for output.  Opcode #%d (count is 1-based). isFrontFace already declared for output.  Opcode #%d (count is 1-based). finalQuadUeq0EdgeTessFactor already declared for output.  Opcode #%d (count is 1-based). finalQuadVeq0EdgeTessFactor already declared for output.  Opcode #%d (count is 1-based). finalQuadUeq1EdgeTessFactor already declared for output.  Opcode #%d (count is 1-based). finalQuadVeq1EdgeTessFactor already declared for output.  Opcode #%d (count is 1-based). finalQuadUInsideTessFactor already declared for output.  Opcode #%d (count is 1-based). finalQuadVInsideTessFactor already declared for output.  Opcode #%d (count is 1-based). finalTriUeq0EdgeTessFactor already declared for output.  Opcode #%d (count is 1-based). finalTriVeq0EdgeTessFactor already declared for output.  Opcode #%d (count is 1-based). finalTriWeq0EdgeTessFactor already declared for output.  Opcode #%d (count is 1-based). finalTriInsideTessFactor already declared for output.  Opcode #%d (count is 1-based). finalLineDetailTessFactor already declared for output.  Opcode #%d (count is 1-based). finalLineDensityTessFactor already declared for output.  Opcode #%d (count is 1-based). position declaration must have xyzw mask.  Opcode #%d (count is 1-based). position already declared for output.  Opcode #%d (count is 1-based). renderTargetArrayIndex already declared for output.  Opcode #%d (count is 1-based). viewportArrayIndex already declared for output.  Opcode #%d (count is 1-based). Global flags already declared once.  Opcode #%d (count is 1-based). Unrecognized global flags.  Opcode #%d (count is 1-based). enableRawAndStructuredBuffers global flag can't be used (not needed) with Compute Shaders.  Opcode #%d (count is 1-based). When streams are declared, you must use emit_stream, cut_stream, and emitthencut_stream instead of emit, cut, and emitthencut.  Opcode #%d (count is 1-based). Input control point count must be [%d..%d].  %d specified.  Opcode #%d (count is 1-based). Hull Shader input control point count already declared. Aborting.  Opcode #%d (count is 1-based). Input control point count must be [0..%d].  %d specified.  Opcode #%d (count is 1-based). Domain Shader input control point count already declared. Aborting.  Opcode #%d (count is 1-based). Hull Shader output control point count already declared. Aborting.  Opcode #%d (count is 1-based). Output control point count must be [0..%d].  %d specified.  Opcode #%d (count is 1-based). Invalid Tessellator Domain specified. Must be isoline, tri or quad. Aborting. Opcode #%d (count is 1-based). Tessellator domain already declared. Aborting. Opcode #%d (count is 1-based). Invalid Tessellator Partitioning specified. Must be integer, pow2, fractional_odd or fractional_even. Aborting. Opcode #%d (count is 1-based). Tessellator Partitioning already declared. Aborting. Opcode #%d (count is 1-based). Invalid Tessellator Output Primitive specified. Must be point, line, triangleCW or triangleCCW. Aborting. Opcode #%d (count is 1-based). Tessellator Output Primitive already declared. Aborting. Opcode #%d (count is 1-based). Hull Shader output max tessfactor already declared. Aborting.  Opcode #%d (count is 1-based). Hull Shader MaxTessFactor must be [%f..%f].  %f specified.  Opcode #%d (count is 1-based). Hull Shader Fork Phase Instance Count already declared in this phase. Aborting.  Opcode #%d (count is 1-based). Hull Shader Fork Phase Instance Count must be [%d..%d].  %d specified.  Opcode #%d (count is 1-based). Hull Shader Join Phase Instance Count already declared in this phase. Aborting.  Opcode #%d (count is 1-based). Hull Shader Join Phase Instance Count must be [%d..%d].  %d specified.  Opcode #%d (count is 1-based). Declared Thread Group X size %d outside valid range [%d..%d].  Opcode #%d (count is 1-based). Declared Thread Group Y size %d outside valid range [%d..%d].  Opcode #%d (count is 1-based). Declared Thread Group Z size %d outside valid range [%d..%d].  Opcode #%d (count is 1-based). Declared Thread Group Count %d (X*Y*Z) is beyond the valid maximum of %d.  Opcode #%d (count is 1-based). Declared Thread Group X size %d outside valid range [%d..%d] for Compute Shader version < 5_0.  Opcode #%d (count is 1-based). Declared Thread Group Y size %d outside valid range [%d..%d] for Compute Shader version < 5_0.  Opcode #%d (count is 1-based). Declared Thread Group Count %d (X*Y*Z) is beyond the valid maximum of %d for Compute Shader version < 5_0.  Opcode #%d (count is 1-based). SRV reference t%d must have a structure byte stride that is a multiple of 4 that is greater than 0 but no greater than %d when declared as structured (%d specified).  Opcode #%d (count is 1-based). UAV u%d already declared.  Opcode #%d (count is 1-based). UAVs must be declared in slots greater than PS outputs.  UAV declared in slot %d while output declared in slot %d.  Opcode #%d (count is 1-based). Texture2DMS[Array] or TextureCube[Array] resources are not supported with UAVs (Unordered Access Views). Opcode #%d (count is 1-based). Invalid resource dimension on resource u%d.  Opcode #%d (count is 1-based). Invalid resource return type on component %d of resource u%d.  Opcode #%d (count is 1-based). UAV reference u%d must be specified with invalid coherency flag.  Opcode #%d (count is 1-based). UAV reference u%d must have a structure byte stride that is a multiple of 4 that is greater than 0 but no greater than %d when declared as structured (%d specified).  Opcode #%d (count is 1-based). UAV reference u%d has invalid flag.  Opcode #%d (count is 1-based). Thread Group Shared Memory reference g%d already declared.  Opcode #%d (count is 1-based). Thread Group Shared Memory reference g%d byteCount (%d specified) must be a nonzero multiple of 4.  Opcode #%d (count is 1-based). Total Thread Group Shared Memory storage exceeded by g# declarations so far up to g%d.  Opcode #%d (count is 1-based). Thread Group Shared Memory reference g%d must have a structure byte stride that is a nonzero multiple of 4 when declared as structured (%d specified).  Opcode #%d (count is 1-based). Output index range defined from %d to %d includes output register %d that was not declared. Registers in an output index range cannot have system names associated with them (TessFactors are an exception).  Output register o%d has a name and is in an index range from o%d to o%d. The intersection of all masks on output registers in an index range cannot be empty. Index range from o%d to o%d has empty mask intersecion. Reference of undeclared temp r%d.  Opcode #%d, operand #%d (counts are 1-based). Reference out of range on vertex axis for input v[%d][].  Input primitive type has %d vertices.  Opcode #%d, operand #%d (counts are 1-based). Reference out of range on vertex axis for input v[%d][].  Input control point has %d vertices.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared input or undeclared components of input v%s[%d].  Opcode #%d, operand #%d (counts are 1-based). Relative indexing input register from base %s[0] not allowed when register 0 has not been declared in an index range.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared input or undeclared components of index range input starting at base v%s[%d].  Opcode #%d, operand #%d (counts are 1-based). Relative indexing input register from base %s[%d] not allowed when register %d has not been declared in an index range.  Opcode #%d, operand #%d (counts are 1-based). Reference out of range on vertex axis for input vcp[%d][].  Input control point has %d vertices.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared input or undeclared components of input vcp[][%d].  Opcode #%d, operand #%d (counts are 1-based). Relative indexing input register from base vcp[0] not allowed when register 0 has not been declared in an index range.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared input or undeclared components of index range input starting at base vcp[][%d].  Opcode #%d, operand #%d (counts are 1-based). Relative indexing input register from base vcp[][%d] not allowed when register %d has not been declared in an index range.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared input or undeclared components of input vpc[%d].  Opcode #%d, operand #%d (counts are 1-based). Relative indexing input register from base vpc[0] not allowed when register 0 has not been declared in an index range.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared input or undeclared components of index range input starting at base vpc[%d].  Opcode #%d, operand #%d (counts are 1-based). Relative indexing input register from base vpc[%d] not allowed when register %d has not been declared in an index range.  Opcode #%d, operand #%d (counts are 1-based). Reference out of range on vertex axis for input vocp[%d][].  Output control points has %d vertices.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared input or undeclared components of input vocp[][%d].  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared input or undeclared components of index range input starting at base vocp[][%d].  Opcode #%d, operand #%d (counts are 1-based). Relative indexing input register from base vocp[][%d] not allowed when register %d has not been declared in an index range.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared output or undeclared components of output o%d.  Opcode #%d, operand #%d (counts are 1-based). Relative indexing output register from base o[0] not allowed when register 0 has not been declared in an index range.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared output or undeclared components of index range output starting at base o[%d].  Opcode #%d, operand #%d (counts are 1-based). Relative indexing output register from base o[%d] not allowed when register %d has not been declared in an index range.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared indexable temp x%d[].  Opcode #%d, operand #%d (counts are 1-based). Reference out of bounds, [%d], on x%d[size==%d].  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared components of indexable temp x%d[].  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared sampler s%d.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared stream m%d.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared resource t%d.  Opcode #%d, operand #%d (counts are 1-based). Reference out of bounds, cb%d.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared constant buffer cb%d[].  Opcode #%d, operand #%d (counts are 1-based). Reference out of bounds, [%d], on cb%d[size==%d] (if size is listed as 0, it means default size is used, which is %d.  Opcode #%d, operand #%d (counts are 1-based). Relative indexing not allowed for cb%d since it was not declared for dynamic indexing..  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared immediate constant buffer.  Opcode #%d, operand #%d (counts are 1-based). Reference out of bounds, [%d], on immediate constant buffer [size==%d].  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared register vPrimitiveID.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared register vGSInstanceID.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared register oDepth.  Opcode #%d, operand #%d (counts are 1-based). Reference of register oDepth does mot match declaration (dcl_oDepthGE or dcl_oDepthLE).  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared register oDepthGE.  Opcode #%d, operand #%d (counts are 1-based). Reference of register oDepthGE does mot match declaration (dcl_oDepth or dcl_oDepthLE).  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared register oDepthLE.  Opcode #%d, operand #%d (counts are 1-based). Reference of register oDepthLE does mot match declaration (dcl_oDepth or dcl_oDepthGE).  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared register vCoverage.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared register oMask.  Opcode #%d, operand #%d (counts are 1-based). Invalid component selection mode for vCycleCounter.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared components of input vCycleCounter.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared register vOutputControlPointID.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared register vForkPhaseInstanceID.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared register vJoinPhaseInstanceID.  Opcode #%d, operand #%d (counts are 1-based). Invalid component selection mode for vInputThreadID.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared components of input vInputThreadID.  Opcode #%d, operand #%d (counts are 1-based). Invalid component selection mode for vInputThreadGroupID.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared components of input vInputThreadGroupID.  Opcode #%d, operand #%d (counts are 1-based). Invalid component selection mode for vInputThreadIDInGroup.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared components of input vInputThreadIDInGroup.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared input vInputThreadIDInGroupFlattened.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared UAV u%d.  Opcode #%d, operand #%d (counts are 1-based). Reference of undeclared thread group shared memory g%d[].  Opcode #%d, operand #%d (counts are 1-based). Reference out of bounds, [%d], on g%d[size==%d].  Opcode #%d, operand #%d (counts are 1-based). Index Dimension %d's relative address temp is out of range (%d specified, max allowed based on temp declaration is %d) for operand #%d of opcode #%d (counts are 1-based). Aborting.Reference of undeclared components of indexable temp x%d[] within relative index of an operand.  Opcode #%d, operand #%d (counts are 1-based). Reference out of range of indexable temp x%d[] within relative index of an operand.  Index [%d] specified, but based on the indexable temp declaration, the max index allowed is [%d].  Operand #%d of opcode #%d (counts are 1-based). Aborting.function table (%d) already declared. Opcode #%d (count 1-based). interface decl references undefined function table (%d).  Opcode #%d (count 1-based).interface decl expects a table of size %d, but table %d has %d elements.  Opcode #%d (count 1-based).interface decl for interface index %d has different function table data than the interface metadata.  Opcode #%d (count 1-based).interface decl declares an interface index %d that is not a base register in the interface metadata.  Opcode #%d (count 1-based).interface decl declares an interface index %d that is not the interface metadata.  Opcode #%d (count 1-based).interface decl declares an invalid interface index %d.  Opcode #%d (count 1-based).interface decl declares an interface index (%d) that has already been declared.  Opcode #%d (count 1-based).bufinfo requires resource declared as Buffer, Raw Buffer or Structured Buffer.  Opcode #%d, operand #%d (counts are 1-based). ld does not support raw or structured buffers.  Opcode #%d, operand #%d (counts are 1-based). ld requires resource declared as texture1D/2D/3D/1DArray/2DArray.  Opcode #%d, operand #%d (counts are 1-based). ld2dms requires resource declared as texture2DMS/texture2DMSArray.  Opcode #%d, operand #%d (counts are 1-based). lod instruction requires sampler declared in default mode.  Opcode #%d, operand #%d (counts are 1-based). lod requires resource declared as texture1D/2D/3D/Cube/CubeArray/1DArray/2DArray.  Opcode #%d, operand #%d (counts are 1-based). gather4gather4_ccomparisongather4_pogather4_po_c%s instruction requires sampler declared in %s mode.  Opcode #%d, operand #%d (counts are 1-based). /Cube/CubeArray%s requires resource declared as texture2D/2DArray%s.  Opcode #%d, operand #%d (counts are 1-based). resinfo requires resource declared as texture1D/2D/3D/Cube/1DArray/2DArray/2DMS/2DMSArray.  Opcode #%d, operand #%d (counts are 1-based). sample/_l/_d instructions require sampler declared in default mode.  Opcode #%d, operand #%d (counts are 1-based). sample/_l/_d requires resource declared as texture1D/2D/3D/Cube/1DArray/2DArray.  Opcode #%d, operand #%d (counts are 1-based). sample_c_* instructions require sampler declared in comparison mode.  Opcode #%d, operand #%d (counts are 1-based). sample_c_* instructions require resource declared as texture1D/2D/Cube/1DArray/2DArray/CubeArray.  Opcode #%d, operand #%d (counts are 1-based). sample_c_* instructions require resource declared as texture1D/2D/Cube, but arrays not allowed.  Opcode #%d, operand #%d (counts are 1-based). sample_b requires sampler declared in default mode.  Opcode #%d, operand #%d (counts are 1-based). bias amount for sample_b must be in the range [%f,%f], but %f was specified as an immediate. Opcode #%d, operand #%d (counts are 1-based). sample_b requires resource declared as texture1D/2D/3D/Cube/1DArray/2DArray.  Opcode #%d, operand #%d (counts are 1-based). swapc requires destination registers to be different.  Opcode #%d, operand #1 and operand #2 (counts are 1-based).sync in Pixel Shader must only sync UAV (sync_uglobal).Opcode #%d (counts are 1-based).sync must include some form of memory barrier - _u (UAV) and/or _g (Thread Group Shared Memory).  Only _t (thread group sync) is optional. Opcode #%d (counts are 1-based).sync can't specify both _ugroup and _uglobal. If both are needed, just specify _uglobal. Opcode #%d (counts are 1-based).ld_uav_typed cannot be used on a UAV that is not declared as typed (u%d). Opcode #%d (counts are 1-based).store_uav_typed cannot be used on a UAV that is not declared as typed (u%d). Opcode #%d (counts are 1-based).store_uav_typed must write to all four components of the UAV. Opcode #%d (counts are 1-based).ld_raw requires resource declared as Raw Buffer.  Opcode #%d, operand #%d (counts are 1-based). ld_raw cannot be used on a resource that is not declared as raw (resource index [%d]). Opcode #%d (counts are 1-based).store_raw cannot be used on a resource that is not declared as raw (resource index [%d]). Opcode #%d (counts are 1-based).ld_structured requires resource declared as Structured Buffer.  Opcode #%d, operand #%d (counts are 1-based). ld_structured cannot be used on a resource that is not declared as structured (resource index [%d]). Opcode #%d (counts are 1-based).store_structured cannot be used on a resource that is not declared as structured (resource index [%d]). Opcode #%d (counts are 1-based).store_structured writing to Thread Group Shared Memory for shader models less than 5_0 must use 
vThreadIDInGroupFlattened as the structure index (second) parameter. Opcode #%d (counts are 1-based).imm_atomic_alloc and imm_atomic_consume on a given UAV (%d) cannot both be in the same shader. Opcode #%d (counts are 1-based).imm_atomic_alloc and imm_atomic_consume can't be combined with other atomic operations on an Append UAV (%d). Opcode #%d (counts are 1-based).imm_atomic_alloc and imm_atomic_consume require as Structured Buffer UAV (slot %d). Opcode #%d (counts are 1-based).sample_* instructions require resource to be declared to return UNORM, SNORM or FLOAT.  Opcode #%d, operand #%d (counts are 1-based). vCycleCounter can only be used with the mov instruction.  Opcode #%d, operand #%d (counts are 1-based). else statement doesn't match to an if statement. Opcode #%d (count 1-based). Aborting validation.else statement seen already.  Opcode #%d (count 1-based). Aborting validation.endif statement doesn't match to an if statement. Opcode #%d (count 1-based). Aborting validation.endloop statement doesn't match to a loop statement. Opcode #%d (count 1-based). Aborting validation.endswitch statement doesn't match to a switch statement. Opcode #%d (count 1-based). Aborting validation.case statement doesn't match to the scope of a switch statement. Opcode #%d (count 1-based). Aborting validation.case %d (or if bits to be interpreted as float: %f) already seen. Opcode #%d (count 1-based).default statement doesn't match to the scope of a switch statement. Opcode #%d (count 1-based). Aborting validation.default statement seen already.  Opcode #%d (count 1-based).continue/continuec statement not inside loop.  Opcode #%d (count 1-based).break/breakc statement not inside loop or switch.  Opcode #%d (count 1-based).call/callc statement not referencing a label.  Opcode #%d (count 1-based).Shader Model 5+ requires that subroutine definitions appear after any call(s) to the subroutine. This also implies recursion is not allowed, although that may or may not be the case here.  Aborting. Opcode #%d (count 1-based).Multiple Hull Shader phases cannot call the same subroutine. If this is an important feature, support could be considered in the future. Opcode #%d (count is 1-based)fcall statement not referencing an interface.  Opcode #%d (count 1-based).fcall statement referencing an undeclared interface (%d).  Opcode #%d (count 1-based).fcall statement referencing an out of bounds function index (%d).  Opcode #%d (count 1-based).Shader exceeds maximum supported number of interface call sites (%d).  Opcode #%d (count 1-based).Multiple Hull Shader phases cannot call the same interface body. If this is an important feature, support could be considered in the future. Opcode #%d (count is 1-based)label (%d) being defined without any callers. Shader Model 5+ requires all callers to a subroutine to appear before the subroutine definition. Aborting.Opcode #%d (count 1-based). label (%d) was never used in the shaderlabel (%d) must be preceded by a ret. Opcode #%d (count 1-based). Aborting validation.label (%d) must not be nested inside flow control. Opcode #%d (count 1-based). Aborting validation.Interpolation mode on input v# register used with eval_* instruction must be linear, linear_centroid, linear_noperspective, linear_noperspective_centroid, linear_sample or linear_noperspective_sample. Opcode #%d (count is 1-based). It is invalid to use eval_* on position input due to hardware limitation.  Opcode #%d (count is 1-based). Can't fall through case/default unless case/default has no code. Opcode #%d (count 1-based). Aborting validation.switch must be followed by case or default. Opcode #%d (count 1-based). Aborting validation.ret can only be followed by case/default/endswitch/endloop/else/endif/label. Opcode #%d (count 1-based). Aborting validation.break/continue can only be followed by case/default/endswitch/endloop/else/endif. Opcode #%d (count 1-based). Aborting validation.label (%d) called but not defined.label (%d) defined but never called.End of program reached with incomplete flow control structure.When code ends in subroutine definition, it must end with ret.%s signature parameter %s (1-based Entry %d) specifies invalid interpolation mode for integer component type. %s signature parameter %s (1-based Entry %d) specifies unrecognized or invalid component type. %s array signature parameter %s cannot be indexed dynamically.Non system-generated input signature parameter (%s) cannot appear after a system generated value.%s signature parameter %s (1-based Entry %d) type must be float32. %s signature parameter %s (1-based Entry %d) type must be uint32. %s signature parameter %s (1-based Entry %d) type must be float32 and mask must be xyzw. Too many %s signature parameters of type SV_ClipDistance or SV_CullDistance.  Maximum number of registers usable is %i.%s signature parameter %s (1-based Entry %d) type must be a scalar uint. %s signature parameter %s (1-based Entry %d) type must be a scalar float. %s signature parameter %s (1-based Entry %d) has an unrecognized system name. Stream index (%u) must between 0 and %u.Patch constant signature parameter #%d (1-based) specifies out of range register %d. Patch constant signature parameter #%d (1-based) specifies register %d (or components in the register) that have already been defined. Patch constant signature name mismatch with declaration in shader code for component %d in register %d. Patch constant signature signature does not specify component %d of register %d which is declared in the shader code. Input signature parameter #%d (1-based) specifies out of range register %d. Input signature parameter #%d (1-based) specifies register %d (or components in the register) that have already been defined. Input signature name mismatch with declaration in shader code for component %d in register %d. Input signature does not specify component %d of register %d which is declared in the shader code. Output signature parameter #%d (1-based) specifies out of range register %d. Output signature parameter #%d (1-based) specifies register %d (or components in the register) that have already been defined. Output signature name mismatch with declaration in shader code for component %d in register %d. Output signature does not specify component %d of register %d which is declared in the shader code. Pixel Shader allows output semantics to be SV_Target, SV_Depth, SV_DepthGreaterEqual, SV_DepthLessEqual or SV_Coverage only.  Output signature parameter #%d (1-based) specifies semantic %s. Double operations not supported unless globalFlags includes enableDoublePrecisionFloatOps.Unrecognized instruction or instruction not valid in vertex shader.Hull Shader declsphase must declare an input control point count.Hull Shader declsphase must declare an output control point count.Hull Shader declsphase must declare a tessellator domain.Hull Shader declsphase must declare a tessellator partitioning.Hull Shader declsphase must declare a tessellator output primitive.Hull Shader declared with IsoLine Domain must specify output primitive point or line. triangle_cw or triangle_ccw output are not compatible with the IsoLine Domain.Hull Shader declared with Tri Domain must specify output primitive point, triangle_cw or triangle_ccw. line output is not compatible with the Tri domain.Hull Shader declared with Quad Domain must specify output primitive point, triangle_cw or triangle_ccw. line output is not compatible with the Quad domain.All HS control point phase input v[][] registers must have control point count (first dimension) declared with size less than or equal to the number of input control points declared in the hs decls phase (%d control points in this case). Input %d has %d control points declared. Total number of scalars across all HS output control points must not exceed %d. Current output control point declaration specifies %d scalars of output per control point with %d output control points, resulting in %d total scalars of output control point data. All HS fork phase input vcp[][] registers must have control point count (first dimension) declared with size less than or equal to the number of input control points declared in the hs decls phase (%d control points in this case). Input %d has %d control points declared. All HS fork phase input vocp[][] registers must have control point count (first dimension) declared with size less than or equal to the number of output control points declared in the hs decls phase (%d control points in this case). Input %d has %d control points declared. Hull Shader Fork Phase reads component(s) of output control point [%d] which were not output by the Control Point Phase.Multiple fork phase programs declared the same component(s) of output patch constant register o[#d].Multiple fork phase programs cannot declare partially overlapping index ranges for output Patch Constant Data. One index range is from register [%d] to [%d], while the another is from [%d] to [%d].All HS join phase input vcp[][] registers must have control point count (first dimension) declared with size equal to the number of input control points declared in the hs decls phase (%d control points in this case). Input %d has %d control points declared. All HS join phase input vocp[][] registers must have control point count (first dimension) declared with size equal to the number of output control points declared in the hs decls phase (%d control points in this case). Input %d has %d control points declared. Hull Shader Join Phase reads component(s) of output control point [%d] which were not output by the Control Point Phase.Join phase declaring component(s) of input patch constant register vpc[%d] which have not been output by previous fork phase(s) or other join phase(s).Join phase declared the same component(s) of output patch constant register o[#d] as already declared for output by a previous fork phase or other joint phase.Multiple fork/join phase programs cannot declare partially overlapping index ranges for output Patch Constant Data. One index range is from register [%d] to [%d], while the another is from [%d] to [%d].When the Hull Shader doesn't have a Control Point Phase, the declared Input Control Point Count (%d) must match the declared Output Control Point Count (%d), indicating the control points will pass through, or the Output Control Point Count can be set 0. 
Related TessFactor names (such as edges) must be declared in the same component of consecutive Patch Constant registers, in the correct order. %s is in %s[%d].%s, which would put %s past the end of the available registers, since it is %d name after %s in the order.Related TessFactor names (such as edges) must be declared in the same component of consecutive Patch Constant registers, in the correct order. %s expected in %s[%d].%s since %s is in %s[%d].%s.TRIQUADISOLINERequired TessFactor name %s for %s domain not found declared anywhere in Patch Constant data. Index ranges declared on Patch Constant Data cannot cross over related blocks of hardware TessFactors. An index range is declared from register [%d] to [%d], which crosses over a block of TessFactors that starts with %s in register [%d] and ends in %s in register [%d].Unrecognized instruction or instruction not valid in Hull Shader.Hull Shader must start with HSDecls phase.Invalid instruction for Hull Shader Decls phase.Declaration statements in HS Control Point phase must appear before other instructions.Invalid instruction for Hull Shader Control Point phase.Declaration statements in HS Fork phase must appear before other instructions.Invalid instruction for Hull Shader Fork phase.Declaration statements in HS Join phase must appear before other instructions.Invalid instruction for Hull Shader Join phase.Invalid instruction for Hull Shader postamble section (subroutines and function bodies).Unrecognized instruction or instruction not valid in Domain Shader.Unrecognized instruction or instruction not valid in geometry shader.Declared output vertex count (%d) multiplied by the total number of declared scalar components of output data (%d) equals %d.  This value cannot be greater than %d.Unrecognized instruction or instruction not valid in pixel shader.Dest register relative index temp register component %d in r%d uninitialized. Opcode #%d (count is 1-based)Dest register relative index indexable-temp register component %d in x[%d][%d] uninitialized. Opcode #%d (count is 1-based)source register relative index temp register component %d in r%d uninitialized. Opcode #%d (count is 1-based)source register relative index indexable-temp register component %d in x[%d][%d] uninitialized. Opcode #%d (count is 1-based)source component %d in temp r%d not initialized. Opcode #%d (count is 1-based)source indexable temp register component %d in x%d[*] never initialized anywhere.Opcode #%d (count is 1-based)Instructions calculating derivatives across pixels, and using temp storage or indexed values for input coordinates, are not permitted within flow control that has a branch condition that could vary across pixels. Opcode %d (count is 1-based).Unrecognized instruction or instruction not valid in Compute Shader.""""PО@` 0 P P`		@?8ư>CA&DT!	@A6?Go@@9RFߑ?$@cܥL@0@/@P@B-DT!	@-DT!	!3|@-DT!@-DT!?-DT!C+eG?`?A>O
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